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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 04/25] target/arm: Pass env pointer through to gvec_bfdot_idx helper
Date: Thu,  5 Sep 2024 14:00:39 +0100	[thread overview]
Message-ID: <20240905130100.298768-5-peter.maydell@linaro.org> (raw)
In-Reply-To: <20240905130100.298768-1-peter.maydell@linaro.org>

Pass the env pointer through to the gvec_bfdot_idx helper,
so we can use it to add support for FEAT_EBF16.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/helper.h             |  4 ++--
 target/arm/tcg/translate-a64.c  | 11 ++++++++++-
 target/arm/tcg/translate-neon.c |  4 ++--
 target/arm/tcg/translate-sve.c  |  8 +++++++-
 target/arm/tcg/vec_helper.c     |  2 +-
 5 files changed, 22 insertions(+), 7 deletions(-)

diff --git a/target/arm/helper.h b/target/arm/helper.h
index 4466e796cb0..e197b5b1d2c 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -1029,8 +1029,8 @@ DEF_HELPER_FLAGS_5(gvec_usmmla_b, TCG_CALL_NO_RWG,
 
 DEF_HELPER_FLAGS_6(gvec_bfdot, TCG_CALL_NO_RWG,
                    void, ptr, ptr, ptr, ptr, env, i32)
-DEF_HELPER_FLAGS_5(gvec_bfdot_idx, TCG_CALL_NO_RWG,
-                   void, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(gvec_bfdot_idx, TCG_CALL_NO_RWG,
+                   void, ptr, ptr, ptr, ptr, env, i32)
 
 DEF_HELPER_FLAGS_5(gvec_bfmmla, TCG_CALL_NO_RWG,
                    void, ptr, ptr, ptr, ptr, i32)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 3813c75895b..c7876513c72 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -6410,13 +6410,22 @@ static bool do_dot_vector_idx(DisasContext *s, arg_qrrx_e *a,
     return true;
 }
 
+static bool do_dot_vector_idx_env(DisasContext *s, arg_qrrx_e *a,
+                                  gen_helper_gvec_4_ptr *fn)
+{
+    if (fp_access_check(s)) {
+        gen_gvec_op4_env(s, a->q, a->rd, a->rn, a->rm, a->rd, a->idx, fn);
+    }
+    return true;
+}
+
 TRANS_FEAT(SDOT_vi, aa64_dp, do_dot_vector_idx, a, gen_helper_gvec_sdot_idx_b)
 TRANS_FEAT(UDOT_vi, aa64_dp, do_dot_vector_idx, a, gen_helper_gvec_udot_idx_b)
 TRANS_FEAT(SUDOT_vi, aa64_i8mm, do_dot_vector_idx, a,
            gen_helper_gvec_sudot_idx_b)
 TRANS_FEAT(USDOT_vi, aa64_i8mm, do_dot_vector_idx, a,
            gen_helper_gvec_usdot_idx_b)
-TRANS_FEAT(BFDOT_vi, aa64_bf16, do_dot_vector_idx, a,
+TRANS_FEAT(BFDOT_vi, aa64_bf16, do_dot_vector_idx_env, a,
            gen_helper_gvec_bfdot_idx)
 
 static bool trans_BFMLAL_vi(DisasContext *s, arg_qrrx_e *a)
diff --git a/target/arm/tcg/translate-neon.c b/target/arm/tcg/translate-neon.c
index 454380f01d7..7de157c539c 100644
--- a/target/arm/tcg/translate-neon.c
+++ b/target/arm/tcg/translate-neon.c
@@ -391,8 +391,8 @@ static bool trans_VDOT_b16_scal(DisasContext *s, arg_VDOT_b16_scal *a)
     if (!dc_isar_feature(aa32_bf16, s)) {
         return false;
     }
-    return do_neon_ddda(s, a->q * 6, a->vd, a->vn, a->vm, a->index,
-                        gen_helper_gvec_bfdot_idx);
+    return do_neon_ddda_env(s, a->q * 6, a->vd, a->vn, a->vm, a->index,
+                            gen_helper_gvec_bfdot_idx);
 }
 
 static bool trans_VFML_scalar(DisasContext *s, arg_VFML_scalar *a)
diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
index e1dd6617e8b..eb77c943c8f 100644
--- a/target/arm/tcg/translate-sve.c
+++ b/target/arm/tcg/translate-sve.c
@@ -265,6 +265,12 @@ static bool gen_gvec_env_arg_zzzz(DisasContext *s, gen_helper_gvec_4_ptr *fn,
     return gen_gvec_env_zzzz(s, fn, a->rd, a->rn, a->rm, a->ra, data);
 }
 
+static bool gen_gvec_env_arg_zzxz(DisasContext *s, gen_helper_gvec_4_ptr *fn,
+                                  arg_rrxr_esz *a)
+{
+    return gen_gvec_env_zzzz(s, fn, a->rd, a->rn, a->rm, a->ra, a->index);
+}
+
 /* Invoke an out-of-line helper on 4 Zregs, 1 Preg, plus fpst. */
 static bool gen_gvec_fpst_zzzzp(DisasContext *s, gen_helper_gvec_5_ptr *fn,
                                 int rd, int rn, int rm, int ra, int pg,
@@ -7128,7 +7134,7 @@ TRANS_FEAT_NONSTREAMING(UMMLA, aa64_sve_i8mm, gen_gvec_ool_arg_zzzz,
 
 TRANS_FEAT(BFDOT_zzzz, aa64_sve_bf16, gen_gvec_env_arg_zzzz,
            gen_helper_gvec_bfdot, a, 0)
-TRANS_FEAT(BFDOT_zzxz, aa64_sve_bf16, gen_gvec_ool_arg_zzxz,
+TRANS_FEAT(BFDOT_zzxz, aa64_sve_bf16, gen_gvec_env_arg_zzxz,
            gen_helper_gvec_bfdot_idx, a)
 
 TRANS_FEAT_NONSTREAMING(BFMMLA, aa64_sve_bf16, gen_gvec_ool_arg_zzzz,
diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c
index 01b36fdd786..a2c62a86d84 100644
--- a/target/arm/tcg/vec_helper.c
+++ b/target/arm/tcg/vec_helper.c
@@ -2828,7 +2828,7 @@ void HELPER(gvec_bfdot)(void *vd, void *vn, void *vm, void *va,
 }
 
 void HELPER(gvec_bfdot_idx)(void *vd, void *vn, void *vm,
-                            void *va, uint32_t desc)
+                            void *va, CPUARMState *env, uint32_t desc)
 {
     intptr_t i, j, opr_sz = simd_oprsz(desc);
     intptr_t index = simd_data(desc);
-- 
2.34.1



  parent reply	other threads:[~2024-09-05 13:02 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-05 13:00 [PULL 00/25] target-arm queue Peter Maydell
2024-09-05 13:00 ` [PULL 01/25] target/arm: Allow setting the FPCR.EBF bit for FEAT_EBF16 Peter Maydell
2024-09-05 13:00 ` [PULL 02/25] target/arm: Pass env pointer through to sme_bfmopa helper Peter Maydell
2024-09-05 13:00 ` [PULL 03/25] target/arm: Pass env pointer through to gvec_bfdot helper Peter Maydell
2024-09-05 13:00 ` Peter Maydell [this message]
2024-09-05 13:00 ` [PULL 05/25] target/arm: Pass env pointer through to gvec_bfmmla helper Peter Maydell
2024-09-05 13:00 ` [PULL 06/25] target/arm: Prepare bfdotadd() callers for FEAT_EBF support Peter Maydell
2024-09-05 13:00 ` [PULL 07/25] target/arm: Implement FPCR.EBF=1 semantics for bfdotadd() Peter Maydell
2024-09-05 13:00 ` [PULL 08/25] target/arm: Enable FEAT_EBF16 in the "max" CPU Peter Maydell
2024-09-05 13:00 ` [PULL 09/25] accel/tcg: Remove dead code from rr_cpu_thread_fn() Peter Maydell
2024-09-05 13:00 ` [PULL 10/25] hw: add compat machines for 9.2 Peter Maydell
2024-09-05 13:00 ` [PULL 11/25] hw/arm/smmuv3: Update comment documenting "stage" property Peter Maydell
2024-09-05 13:00 ` [PULL 12/25] hw/arm/virt: Default to two-stage SMMU from virt-9.2 Peter Maydell
2024-09-05 13:00 ` [PULL 13/25] hw/arm/sbsa-ref: Use two-stage SMMU Peter Maydell
2024-09-05 13:00 ` [PULL 14/25] hw/misc/xlnx-versal-cfu: destroy fifo in finalize Peter Maydell
2024-09-05 13:00 ` [PULL 15/25] hw/misc/xlnx-versal-trng: Free s->prng in finalize, not unrealize Peter Maydell
2024-09-05 13:00 ` [PULL 16/25] hw/nvram/xlnx-bbram: Call register_finalize_block Peter Maydell
2024-09-05 13:00 ` [PULL 17/25] hw/nvram/xlnx-zynqmp-efuse: " Peter Maydell
2024-09-05 13:00 ` [PULL 18/25] hw/misc/xlnx-versal-trng: " Peter Maydell
2024-09-05 13:00 ` [PULL 19/25] hm/nvram/xlnx-versal-efuse-ctrl: " Peter Maydell
2024-09-05 13:00 ` [PULL 20/25] hw/arm/sbsa-ref: Don't leak string in sbsa_fdt_add_gic_node() Peter Maydell
2024-09-05 13:00 ` [PULL 21/25] target/arm: Correct names of VFP VFNMA and VFNMS insns Peter Maydell
2024-09-05 13:00 ` [PULL 22/25] hw/arm/xilinx_zynq: Enable Security Extensions Peter Maydell
2024-09-05 13:00 ` [PULL 23/25] hw/arm/boot: Report error msg if loading elf/dtb failed Peter Maydell
2024-09-05 13:00 ` [PULL 24/25] hw/arm/boot: Explain why load_elf_hdr() error is ignored Peter Maydell
2024-09-05 13:01 ` [PULL 25/25] platform-bus: fix refcount leak Peter Maydell
2024-09-06 14:24 ` [PULL 00/25] target-arm queue Peter Maydell

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