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From: Guenter Roeck <linux@roeck-us.net>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Guenter Roeck" <linux@roeck-us.net>
Subject: [PATCH 3/3] tmp105: Lower 4 bit of limit registers are always 0
Date: Fri,  6 Sep 2024 06:29:12 -0700	[thread overview]
Message-ID: <20240906132912.3826089-4-linux@roeck-us.net> (raw)
In-Reply-To: <20240906132912.3826089-1-linux@roeck-us.net>

Per datasheet, "HIGH AND LOW LIMIT REGISTERS", the lower 4 bit
of the limit registers are unused and always report 0.
The lower 4 bit should not be used for temperature comparisons,
so mask the unused bits before storing the limits.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
 hw/sensor/tmp105.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/sensor/tmp105.c b/hw/sensor/tmp105.c
index 22728798f7..5fd30f8d50 100644
--- a/hw/sensor/tmp105.c
+++ b/hw/sensor/tmp105.c
@@ -166,7 +166,7 @@ static void tmp105_write(TMP105State *s)
     case TMP105_REG_T_HIGH:
         if (s->len >= 3)
             s->limit[s->pointer & 1] = (int16_t)
-                    ((((uint16_t) s->buf[0]) << 8) | s->buf[1]);
+                    ((((uint16_t) s->buf[0]) << 8) | (s->buf[1] & 0xf0));
         tmp105_alarm_update(s);
         break;
     }
-- 
2.45.2



  parent reply	other threads:[~2024-09-06 13:31 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-06 13:29 [PATCH 0/3] tmp105: Improvements and fixes Guenter Roeck
2024-09-06 13:29 ` [PATCH 1/3] tmp105: Coding style fixes Guenter Roeck
2024-09-06 13:29 ` [PATCH 2/3] tmp105: OS (one-shot) bit in configuration register always returns 0 Guenter Roeck
2024-09-06 15:48   ` Philippe Mathieu-Daudé
2024-09-06 13:29 ` Guenter Roeck [this message]
2024-09-06 15:44 ` [PATCH 0/3] tmp105: Improvements and fixes Cédric Le Goater

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