From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: zhiwei_liu@linux.alibaba.com, tangtiancheng.ttc@alibaba-inc.com,
philmd@linaro.org
Subject: [PATCH v2 09/18] tcg/optimize: Optimize bitsel_vec
Date: Wed, 11 Sep 2024 09:50:38 -0700 [thread overview]
Message-ID: <20240911165047.1035764-10-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240911165047.1035764-1-richard.henderson@linaro.org>
Fold matching true/false operands.
Fold true/false operands with 0/-1 to simpler logicals.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/optimize.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index f11f576fd4..e9ef16b3c6 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -2737,6 +2737,61 @@ static bool fold_xor(OptContext *ctx, TCGOp *op)
return fold_masks(ctx, op);
}
+static bool fold_bitsel_vec(OptContext *ctx, TCGOp *op)
+{
+ /* If true and false values are the same, eliminate the cmp. */
+ if (args_are_copies(op->args[2], op->args[3])) {
+ return tcg_opt_gen_mov(ctx, op, op->args[0], op->args[2]);
+ }
+
+ if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
+ uint64_t tv = arg_info(op->args[2])->val;
+ uint64_t fv = arg_info(op->args[3])->val;
+
+ if (tv == -1 && fv == 0) {
+ return tcg_opt_gen_mov(ctx, op, op->args[0], op->args[1]);
+ }
+ if (tv == 0 && fv == -1) {
+ if (TCG_TARGET_HAS_not_vec) {
+ op->opc = INDEX_op_not_vec;
+ return fold_not(ctx, op);
+ } else {
+ op->opc = INDEX_op_xor_vec;
+ op->args[2] = arg_new_constant(ctx, -1);
+ return fold_xor(ctx, op);
+ }
+ }
+ }
+ if (arg_is_const(op->args[2])) {
+ uint64_t tv = arg_info(op->args[2])->val;
+ if (tv == -1) {
+ op->opc = INDEX_op_or_vec;
+ op->args[2] = op->args[3];
+ return fold_or(ctx, op);
+ }
+ if (tv == 0 && TCG_TARGET_HAS_andc_vec) {
+ op->opc = INDEX_op_andc_vec;
+ op->args[2] = op->args[1];
+ op->args[1] = op->args[3];
+ return fold_andc(ctx, op);
+ }
+ }
+ if (arg_is_const(op->args[3])) {
+ uint64_t fv = arg_info(op->args[3])->val;
+ if (fv == 0) {
+ op->opc = INDEX_op_and_vec;
+ return fold_and(ctx, op);
+ }
+ if (fv == -1 && TCG_TARGET_HAS_orc_vec) {
+ op->opc = INDEX_op_orc_vec;
+ op->args[2] = op->args[1];
+ op->args[1] = op->args[3];
+ return fold_orc(ctx, op);
+ }
+ }
+ return false;
+}
+
/* Propagate constants and copies, fold constant expressions. */
void tcg_optimize(TCGContext *s)
{
@@ -2964,6 +3019,9 @@ void tcg_optimize(TCGContext *s)
case INDEX_op_cmpsel_vec:
done = fold_cmpsel_vec(&ctx, op);
break;
+ case INDEX_op_bitsel_vec:
+ done = fold_bitsel_vec(&ctx, op);
+ break;
CASE_OP_32_64(sextract):
done = fold_sextract(&ctx, op);
break;
--
2.43.0
next prev parent reply other threads:[~2024-09-11 16:51 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-11 16:50 [PATCH v2 00/18] tcg: Improve support for cmpsel_vec Richard Henderson
2024-09-11 16:50 ` [PATCH v2 01/18] tcg: Export vec_gen_6 Richard Henderson
2024-09-11 16:50 ` [PATCH v2 02/18] tcg/i386: Split out tcg_out_vex_modrm_type Richard Henderson
2024-09-11 16:50 ` [PATCH v2 03/18] tcg/i386: Do not expand cmp_vec early Richard Henderson
2024-09-11 16:50 ` [PATCH v2 04/18] tcg/i386: Do not expand cmpsel_vec early Richard Henderson
2024-09-11 16:50 ` [PATCH v2 05/18] tcg/ppc: Do not expand cmp_vec early Richard Henderson
2024-09-11 16:50 ` [PATCH v2 06/18] tcg/s390x: " Richard Henderson
2024-09-11 16:50 ` [PATCH v2 07/18] tcg/optimize: Fold movcond with true and false values identical Richard Henderson
2024-09-11 16:50 ` [PATCH v2 08/18] tcg/optimize: Optimize cmp_vec and cmpsel_vec Richard Henderson
2024-09-11 16:50 ` Richard Henderson [this message]
2024-09-11 16:50 ` [PATCH v2 10/18] tcg/i386: Optimize cmpsel with constant 0 operand 3 Richard Henderson
2024-09-11 16:50 ` [PATCH v2 11/18] tcg/i386: Implement cmp_vec with avx512 insns Richard Henderson
2024-09-11 16:50 ` [PATCH v2 12/18] tcg/i386: Add predicate parameters to tcg_out_evex_opc Richard Henderson
2024-09-11 16:50 ` [PATCH v2 13/18] tcg/i386: Implement cmpsel_vec with avx512 insns Richard Henderson
2024-09-11 16:50 ` [PATCH v2 14/18] tcg/i386: Implement vector TST{EQ,NE} for avx512 Richard Henderson
2024-09-12 6:04 ` [PATCH v2 14/18] tcg/i386: Implement vector TST{EQ, NE} " Philippe Mathieu-Daudé
2024-09-11 16:50 ` [PATCH v2 15/18] tcg/ppc: Implement cmpsel_vec Richard Henderson
2024-09-11 16:50 ` [PATCH v2 16/18] tcg/ppc: Optimize cmpsel with constant 0/-1 arguments Richard Henderson
2024-09-11 16:50 ` [PATCH v2 17/18] tcg/s390x: Implement cmpsel_vec Richard Henderson
2024-09-11 16:50 ` [PATCH v2 18/18] tcg/s390x: Optimize cmpsel with constant 0/-1 arguments Richard Henderson
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