From: "Cédric Le Goater" <clg@redhat.com>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PULL 11/12] aspeed: Add tmp105 in i2c bus 0 for AST2700
Date: Mon, 16 Sep 2024 20:57:07 +0200 [thread overview]
Message-ID: <20240916185708.574546-12-clg@redhat.com> (raw)
In-Reply-To: <20240916185708.574546-1-clg@redhat.com>
From: Jamin Lin <jamin_lin@aspeedtech.com>
ASPEED SDK add lm75 in i2c bus 0 for AST2700.
LM75 is compatible with TMP105 driver.
Introduce a new i2c init function and
add tmp105 device model in i2c bus 0.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index fd5603f7aa23..3d13b16768f7 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -1650,6 +1650,15 @@ static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
}
#ifdef TARGET_AARCH64
+static void ast2700_evb_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+
+ /* LM75 is compatible with TMP105 driver */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0),
+ TYPE_TMP105, 0x4d);
+}
+
static void aspeed_machine_ast2700_evb_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@@ -1664,6 +1673,7 @@ static void aspeed_machine_ast2700_evb_class_init(ObjectClass *oc, void *data)
amc->num_cs = 2;
amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON;
amc->uart_default = ASPEED_DEV_UART12;
+ amc->i2c_init = ast2700_evb_i2c_init;
mc->default_ram_size = 1 * GiB;
aspeed_machine_class_init_cpus_defaults(mc);
}
--
2.46.0
next prev parent reply other threads:[~2024-09-16 19:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-16 18:56 [PULL 00/12] aspeed queue Cédric Le Goater
2024-09-16 18:56 ` [PULL 01/12] hw/gpio/aspeed_gpio: Avoid shift into sign bit Cédric Le Goater
2024-09-16 18:56 ` [PULL 02/12] hw/i2c/aspeed: Support discontinuous register memory region of I2C bus Cédric Le Goater
2024-09-16 18:56 ` [PULL 03/12] hw/i2c/aspeed: Introduce a new bus pool buffer attribute in AspeedI2Cbus Cédric Le Goater
2024-09-16 18:57 ` [PULL 04/12] hw/i2c/aspeed: Support discontinuous poll buffer memory region of I2C bus Cédric Le Goater
2024-09-16 18:57 ` [PULL 05/12] hw/i2c/aspeed: Introduce a new dma_dram_offset attribute in AspeedI2Cbus Cédric Le Goater
2024-09-16 18:57 ` [PULL 06/12] hw/i2c/aspeed: Add AST2700 support Cédric Le Goater
2024-09-16 18:57 ` [PULL 07/12] hw/i2c/aspeed: Add support for Tx/Rx buffer 64 bit addresses Cédric Le Goater
2024-09-16 18:57 ` [PULL 08/12] hw/i2c/aspeed: Add support for " Cédric Le Goater
2024-09-16 18:57 ` [PULL 09/12] aspeed/soc: Introduce a new API to get the device irq Cédric Le Goater
2024-09-16 18:57 ` [PULL 10/12] aspeed/soc: Support I2C for AST2700 Cédric Le Goater
2024-09-16 18:57 ` Cédric Le Goater [this message]
2024-09-16 18:57 ` [PULL 12/12] machine_aspeed.py: Update to test " Cédric Le Goater
2024-09-17 13:00 ` [PULL 00/12] aspeed queue Peter Maydell
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