From: "Cédric Le Goater" <clg@redhat.com>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PULL 01/12] hw/gpio/aspeed_gpio: Avoid shift into sign bit
Date: Mon, 16 Sep 2024 20:56:57 +0200 [thread overview]
Message-ID: <20240916185708.574546-2-clg@redhat.com> (raw)
In-Reply-To: <20240916185708.574546-1-clg@redhat.com>
From: Peter Maydell <peter.maydell@linaro.org>
In aspeed_gpio_update() we calculate "mask = 1 << gpio", where
gpio can be between 0 and 31. Coverity complains about this
because 1 << 31 won't fit in a signed integer.
For QEMU this isn't an error because we enable -fwrapv,
but we can keep Coverity happy by doing the shift on
unsigned numbers.
Resolves: Coverity CID 1547742
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
hw/gpio/aspeed_gpio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c
index 3e7b35cf4f54..71756664dd69 100644
--- a/hw/gpio/aspeed_gpio.c
+++ b/hw/gpio/aspeed_gpio.c
@@ -281,7 +281,7 @@ static void aspeed_gpio_update(AspeedGPIOState *s, GPIOSets *regs,
diff &= mode_mask;
if (diff) {
for (gpio = 0; gpio < ASPEED_GPIOS_PER_SET; gpio++) {
- uint32_t mask = 1 << gpio;
+ uint32_t mask = 1U << gpio;
/* If the gpio needs to be updated... */
if (!(diff & mask)) {
--
2.46.0
next prev parent reply other threads:[~2024-09-16 18:58 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-16 18:56 [PULL 00/12] aspeed queue Cédric Le Goater
2024-09-16 18:56 ` Cédric Le Goater [this message]
2024-09-16 18:56 ` [PULL 02/12] hw/i2c/aspeed: Support discontinuous register memory region of I2C bus Cédric Le Goater
2024-09-16 18:56 ` [PULL 03/12] hw/i2c/aspeed: Introduce a new bus pool buffer attribute in AspeedI2Cbus Cédric Le Goater
2024-09-16 18:57 ` [PULL 04/12] hw/i2c/aspeed: Support discontinuous poll buffer memory region of I2C bus Cédric Le Goater
2024-09-16 18:57 ` [PULL 05/12] hw/i2c/aspeed: Introduce a new dma_dram_offset attribute in AspeedI2Cbus Cédric Le Goater
2024-09-16 18:57 ` [PULL 06/12] hw/i2c/aspeed: Add AST2700 support Cédric Le Goater
2024-09-16 18:57 ` [PULL 07/12] hw/i2c/aspeed: Add support for Tx/Rx buffer 64 bit addresses Cédric Le Goater
2024-09-16 18:57 ` [PULL 08/12] hw/i2c/aspeed: Add support for " Cédric Le Goater
2024-09-16 18:57 ` [PULL 09/12] aspeed/soc: Introduce a new API to get the device irq Cédric Le Goater
2024-09-16 18:57 ` [PULL 10/12] aspeed/soc: Support I2C for AST2700 Cédric Le Goater
2024-09-16 18:57 ` [PULL 11/12] aspeed: Add tmp105 in i2c bus 0 " Cédric Le Goater
2024-09-16 18:57 ` [PULL 12/12] machine_aspeed.py: Update to test I2C " Cédric Le Goater
2024-09-17 13:00 ` [PULL 00/12] aspeed queue Peter Maydell
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