From: Zhao Liu <zhao1.liu@intel.com>
To: "Daniel P . Berrangé" <berrange@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Frédéric Barrat" <fbarrat@linux.ibm.com>,
"Daniel Henrique Barboza" <danielhb413@gmail.com>,
"David Gibson" <david@gibson.dropbear.id.au>,
"Harsh Prateek Bora" <harshpb@linux.ibm.com>,
"Markus Armbruster" <armbru@redhat.com>,
"Marcelo Tosatti" <mtosatti@redhat.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Peter Maydell" <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, qemu-ppc@nongnu.org,
qemu-arm@nongnu.org, Zhenyu Wang <zhenyu.z.wang@intel.com>,
Dapeng Mi <dapeng1.mi@linux.intel.com>,
Yongwei Ma <yongwei.ma@intel.com>, Zhao Liu <zhao1.liu@intel.com>
Subject: [RFC v2 08/15] hw/cpu/core: Convert cpu-core from general device to topology device
Date: Thu, 19 Sep 2024 09:55:26 +0800 [thread overview]
Message-ID: <20240919015533.766754-9-zhao1.liu@intel.com> (raw)
In-Reply-To: <20240919015533.766754-1-zhao1.liu@intel.com>
Convert cpu-core to topology device then it can be added into topology
tree.
At present, only PPC is using cpu-core device. For topology tree, it's
necessary to add cpu-core in the tree as one of the topology
hierarchies.
The generic cpu-core is sufficient to express the core layer in a
topology tree without needing to consider any arch-specific feature, so
to reduce the support complexity of the topology tree and allow arch to
be able to use the abstract cpu-core directly, without further
derivation of the arch-specific core, remove the "abstract" restriction
from TypeInfo.
Because cpu-core then inherits properties and settings of topology
device, also make the following changes to take into account the special
case for cpu-core:
* Omit setting category since topology device has already set.
* Make realize() of topology device as the parent realize() for PPC
cores.
* Set cpu-core's topology level as core.
* Mask bus_type for PPC cores as NULL to avoid PPC cores' creation
failure since PPC currently doesn't support topology tree.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
hw/cpu/core.c | 9 +++++----
hw/ppc/pnv_core.c | 11 ++++++++++-
hw/ppc/spapr_cpu_core.c | 12 +++++++++++-
include/hw/cpu/core.h | 3 ++-
include/hw/ppc/pnv_core.h | 3 ++-
include/hw/ppc/spapr_cpu_core.h | 4 +++-
6 files changed, 33 insertions(+), 9 deletions(-)
diff --git a/hw/cpu/core.c b/hw/cpu/core.c
index 495a5c30ffe1..bf1cbceea21b 100644
--- a/hw/cpu/core.c
+++ b/hw/cpu/core.c
@@ -79,19 +79,20 @@ static void cpu_core_instance_init(Object *obj)
static void cpu_core_class_init(ObjectClass *oc, void *data)
{
- DeviceClass *dc = DEVICE_CLASS(oc);
+ CPUTopoClass *tc = CPU_TOPO_CLASS(oc);
- set_bit(DEVICE_CATEGORY_CPU, dc->categories);
+ /* TODO: Offload "core-id" and "nr-threads" to ppc-specific core. */
object_class_property_add(oc, "core-id", "int", core_prop_get_core_id,
core_prop_set_core_id, NULL, NULL);
object_class_property_add(oc, "nr-threads", "int", core_prop_get_nr_threads,
core_prop_set_nr_threads, NULL, NULL);
+
+ tc->level = CPU_TOPOLOGY_LEVEL_CORE;
}
static const TypeInfo cpu_core_type_info = {
.name = TYPE_CPU_CORE,
- .parent = TYPE_DEVICE,
- .abstract = true,
+ .parent = TYPE_CPU_TOPO,
.class_init = cpu_core_class_init,
.instance_size = sizeof(CPUCore),
.instance_init = cpu_core_instance_init,
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index a30693990b25..9be7a4b6c1a9 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -356,6 +356,8 @@ static void pnv_core_realize(DeviceState *dev, Error **errp)
assert(pc->chip);
+ pcc->parent_realize(dev, errp);
+
pc->threads = g_new(PowerPCCPU *, cc->nr_threads);
for (i = 0; i < cc->nr_threads; i++) {
PowerPCCPU *cpu;
@@ -466,11 +468,18 @@ static void pnv_core_power10_class_init(ObjectClass *oc, void *data)
static void pnv_core_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
+ PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
- dc->realize = pnv_core_realize;
dc->unrealize = pnv_core_unrealize;
device_class_set_props(dc, pnv_core_properties);
dc->user_creatable = false;
+ device_class_set_parent_realize(dc, pnv_core_realize,
+ &pcc->parent_realize);
+ /*
+ * Avoid ppc that do not support topology device trees from
+ * encountering error when creating cores.
+ */
+ dc->bus_type = NULL;
}
#define DEFINE_PNV_CORE_TYPE(family, cpu_model) \
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 464224516881..49c440fc0e09 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -338,6 +338,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
(SpaprMachineState *) object_dynamic_cast(qdev_get_machine(),
TYPE_SPAPR_MACHINE);
SpaprCpuCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
+ SpaprCpuCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(sc);
CPUCore *cc = CPU_CORE(OBJECT(dev));
int i;
@@ -346,6 +347,8 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
return;
}
+ scc->parent_realize(dev, errp);
+
qemu_register_reset(spapr_cpu_core_reset_handler, sc);
sc->threads = g_new0(PowerPCCPU *, cc->nr_threads);
for (i = 0; i < cc->nr_threads; i++) {
@@ -376,11 +379,18 @@ static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
SpaprCpuCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc);
- dc->realize = spapr_cpu_core_realize;
dc->unrealize = spapr_cpu_core_unrealize;
device_class_set_legacy_reset(dc, spapr_cpu_core_reset);
device_class_set_props(dc, spapr_cpu_core_properties);
+ dc->hotpluggable = true;
scc->cpu_type = data;
+ device_class_set_parent_realize(dc, spapr_cpu_core_realize,
+ &scc->parent_realize);
+ /*
+ * Avoid ppc that do not support topology device trees from
+ * encountering error when creating cores.
+ */
+ dc->bus_type = NULL;
}
#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
diff --git a/include/hw/cpu/core.h b/include/hw/cpu/core.h
index 98ab91647eb2..a451dcd2e4d8 100644
--- a/include/hw/cpu/core.h
+++ b/include/hw/cpu/core.h
@@ -9,6 +9,7 @@
#ifndef HW_CPU_CORE_H
#define HW_CPU_CORE_H
+#include "hw/cpu/cpu-topology.h"
#include "hw/qdev-core.h"
#include "qom/object.h"
@@ -18,7 +19,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(CPUCore, CPU_CORE)
struct CPUCore {
/*< private >*/
- DeviceState parent_obj;
+ CPUTopoState parent_obj;
/*< public >*/
int core_id;
diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
index d8afb4f95f92..252b98ae20f9 100644
--- a/include/hw/ppc/pnv_core.h
+++ b/include/hw/ppc/pnv_core.h
@@ -71,10 +71,11 @@ struct PnvCore {
};
struct PnvCoreClass {
- DeviceClass parent_class;
+ CPUTopoClass parent_class;
const MemoryRegionOps *xscom_ops;
uint64_t xscom_size;
+ DeviceRealize parent_realize;
};
#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
index 69a52e39b850..fc6c15747a88 100644
--- a/include/hw/ppc/spapr_cpu_core.h
+++ b/include/hw/ppc/spapr_cpu_core.h
@@ -32,8 +32,10 @@ struct SpaprCpuCore {
};
struct SpaprCpuCoreClass {
- DeviceClass parent_class;
+ CPUTopoClass parent_class;
+
const char *cpu_type;
+ DeviceRealize parent_realize;
};
const char *spapr_get_cpu_core_type(const char *cpu_type);
--
2.34.1
next prev parent reply other threads:[~2024-09-19 1:43 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-19 1:55 [RFC v2 00/15] qom-topo: Abstract CPU Topology Level to Topology Device Zhao Liu
2024-09-19 1:55 ` [RFC v2 01/15] qdev: Add pointer to BusChild in DeviceState Zhao Liu
2024-09-19 1:55 ` [RFC v2 02/15] qdev: Add the interface to reparent the device Zhao Liu
2024-09-19 1:55 ` [RFC v2 03/15] hw/cpu: Introduce CPU topology device and CPU bus Zhao Liu
2024-09-19 1:55 ` [RFC v2 04/15] hw/cpu: Introduce CPU slot to manage CPU topology Zhao Liu
2024-09-19 1:55 ` [RFC v2 05/15] qdev: Add method in BusClass to customize device index Zhao Liu
2024-09-19 1:55 ` [RFC v2 06/15] hw/core: Create CPU slot in MachineState to manage CPU topology tree Zhao Liu
2024-09-19 1:55 ` [RFC v2 07/15] hw/core/cpu: Convert CPU from general device to topology device Zhao Liu
2024-09-19 1:55 ` Zhao Liu [this message]
2024-09-19 1:55 ` [RFC v2 09/15] hw/cpu: Abstract module/die/socket levels as topology devices Zhao Liu
2024-09-19 1:55 ` [RFC v2 10/15] hw/machine: Build smp topology tree from -smp Zhao Liu
2024-09-19 1:55 ` [RFC v2 11/15] hw/core: Support topology tree in none machine for compatibility Zhao Liu
2024-09-19 1:55 ` [RFC v2 12/15] hw/i386: Allow i386 to create new CPUs in topology tree Zhao Liu
2024-09-19 1:55 ` [RFC v2 13/15] system/qdev-monitor: Introduce bus-finder interface for compatibility with bus-less plug behavior Zhao Liu
2024-09-19 1:55 ` [RFC v2 14/15] i386/cpu: Support CPU plugged in topology tree via bus-finder Zhao Liu
2024-09-19 1:55 ` [RFC v2 15/15] i386: Support topology device tree Zhao Liu
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