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[90.181.218.29]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a90612df525sm1067909966b.159.2024.09.22.05.01.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Sep 2024 05:01:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org Subject: [PULL 00/31] tcg + linux-user patch queue Date: Sun, 22 Sep 2024 14:00:41 +0200 Message-ID: <20240922120112.5067-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The following changes since commit 01dc65a3bc262ab1bec8fe89775e9bbfa627becb: Merge tag 'pull-target-arm-20240919' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-09-19 14:15:15 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240922 for you to fetch changes up to c4d80fa63e823dc8dbf094b29e39b6978a3073b6: linux-user: update syscall.tbl to Linux v6.11 (2024-09-22 09:30:18 +0200) ---------------------------------------------------------------- target/ppc: Fix lxvx/stxvx facility check linux-user: update syscall_nr.h to Linux v6.10 linux-user: update syscall.tbl to Linux v6.11 tcg: Fix iteration step in 32-bit gvec operation tcg: Propagate new TCGOp to add_as_label_use tcg/*: Do not expand cmp_vec, cmpsel_vec early tcg/optimize: Fold movcond with true and false values identical tcg/optimize: Optimize cmp_vec and cmpsel_vec tcg/optimize: Optimize bitsel_vec tcg/i386: Optimize cmpsel with constant 0 operand 3. tcg/i386: Implement cmp_vec with avx512 insns tcg/i386: Implement cmpsel_vec with avx512 insns tcg/i386: Implement vector TST{EQ,NE} for avx512 tcg/ppc: Implement cmpsel_vec and optimize with constant 0/-1 arguments tcg/s390x: Implement cmpsel_vec and optimize with constant 0/-1 arguments ---------------------------------------------------------------- Fabiano Rosas (1): target/ppc: Fix lxvx/stxvx facility check Laurent Vivier (9): linux-user: update syscall_nr.h to Linux v6.10 linux-user, mips: update syscall-args-o32.c.inc to Linux v6.10 linux-user: update syscall.tbl to Linux v6.10 linux-user,aarch64: move to syscalltbl file linux-user,openrisc: move to syscalltbl file linux-user,riscv: move to syscalltbl file linux-user,hexagon: move to syscalltbl file linux-user,loongarch: move to syscalltbl file linux-user: update syscall.tbl to Linux v6.11 Richard Henderson (20): tcg: Return TCGOp from tcg_gen_op[1-6] tcg: Propagate new TCGOp to add_as_label_use tcg: Export vec_gen_6 tcg/i386: Split out tcg_out_vex_modrm_type tcg/i386: Do not expand cmp_vec early tcg/i386: Do not expand cmpsel_vec early tcg/ppc: Do not expand cmp_vec early tcg/s390x: Do not expand cmp_vec early tcg/optimize: Fold movcond with true and false values identical tcg/optimize: Optimize cmp_vec and cmpsel_vec tcg/optimize: Optimize bitsel_vec tcg/i386: Optimize cmpsel with constant 0 operand 3. tcg/i386: Implement cmp_vec with avx512 insns tcg/i386: Add predicate parameters to tcg_out_evex_opc tcg/i386: Implement cmpsel_vec with avx512 insns tcg/i386: Implement vector TST{EQ,NE} for avx512 tcg/ppc: Implement cmpsel_vec tcg/ppc: Optimize cmpsel with constant 0/-1 arguments tcg/s390x: Implement cmpsel_vec tcg/s390x: Optimize cmpsel with constant 0/-1 arguments TANG Tiancheng (1): tcg: Fix iteration step in 32-bit gvec operation linux-user/aarch64/syscall_nr.h | 314 +------------------ linux-user/hexagon/syscall_nr.h | 332 -------------------- linux-user/loongarch64/syscall_nr.h | 312 ------------------ linux-user/openrisc/syscall_nr.h | 334 -------------------- linux-user/riscv/syscall32_nr.h | 308 ------------------ linux-user/riscv/syscall64_nr.h | 314 ------------------- linux-user/riscv/syscall_nr.h | 15 - linux-user/syscall_defs.h | 7 +- tcg/i386/tcg-target-con-set.h | 1 + tcg/i386/tcg-target-con-str.h | 1 + tcg/i386/tcg-target.h | 4 +- tcg/i386/tcg-target.opc.h | 1 - tcg/ppc/tcg-target-con-set.h | 1 + tcg/ppc/tcg-target.h | 2 +- tcg/s390x/tcg-target-con-set.h | 2 + tcg/s390x/tcg-target-con-str.h | 1 + tcg/s390x/tcg-target.h | 2 +- tcg/tcg-internal.h | 14 +- linux-user/riscv/cpu_loop.c | 2 +- tcg/optimize.c | 99 ++++++ tcg/tcg-op-gvec.c | 2 +- tcg/tcg-op-vec.c | 4 +- tcg/tcg-op.c | 86 ++--- configs/targets/aarch64-linux-user.mak | 2 + configs/targets/aarch64_be-linux-user.mak | 2 + configs/targets/hexagon-linux-user.mak | 2 + configs/targets/loongarch64-linux-user.mak | 2 + configs/targets/or1k-linux-user.mak | 2 + configs/targets/riscv32-linux-user.mak | 3 + configs/targets/riscv64-linux-user.mak | 3 + linux-user/aarch64/meson.build | 6 + linux-user/aarch64/syscall_64.tbl | 405 ++++++++++++++++++++++++ linux-user/aarch64/syscallhdr.sh | 28 ++ linux-user/alpha/syscall.tbl | 28 +- linux-user/arm/syscall.tbl | 25 +- linux-user/hexagon/meson.build | 6 + linux-user/hexagon/syscall.tbl | 405 ++++++++++++++++++++++++ linux-user/hexagon/syscallhdr.sh | 28 ++ linux-user/hppa/syscall.tbl | 41 ++- linux-user/i386/syscall_32.tbl | 35 ++- linux-user/loongarch64/meson.build | 7 + linux-user/loongarch64/syscall.tbl | 405 ++++++++++++++++++++++++ linux-user/loongarch64/syscallhdr.sh | 28 ++ linux-user/m68k/syscall.tbl | 22 +- linux-user/meson.build | 2 + linux-user/microblaze/syscall.tbl | 22 +- linux-user/mips/syscall-args-o32.c.inc | 20 ++ linux-user/mips/syscall_o32.tbl | 36 ++- linux-user/mips64/syscall_n32.tbl | 32 +- linux-user/mips64/syscall_n64.tbl | 20 +- linux-user/openrisc/meson.build | 5 + linux-user/openrisc/syscall.tbl | 405 ++++++++++++++++++++++++ linux-user/openrisc/syscallhdr.sh | 28 ++ linux-user/ppc/syscall.tbl | 71 +++-- linux-user/riscv/meson.build | 6 + linux-user/riscv/syscall.tbl | 405 ++++++++++++++++++++++++ linux-user/riscv/syscallhdr.sh | 28 ++ linux-user/s390x/syscall.tbl | 34 +- linux-user/sh4/syscall.tbl | 25 +- linux-user/sparc/syscall.tbl | 40 ++- linux-user/x86_64/syscall_64.tbl | 30 +- linux-user/xtensa/syscall.tbl | 22 +- scripts/gensyscalls.sh | 103 ------ scripts/update-syscalltbl.sh | 5 + target/ppc/translate/vsx-impl.c.inc | 2 +- tcg/i386/tcg-target.c.inc | 488 ++++++++++++++++++----------- tcg/ppc/tcg-target.c.inc | 254 +++++++++------ tcg/s390x/tcg-target.c.inc | 195 ++++++------ 68 files changed, 3361 insertions(+), 2560 deletions(-) delete mode 100644 linux-user/hexagon/syscall_nr.h delete mode 100644 linux-user/loongarch64/syscall_nr.h delete mode 100644 linux-user/openrisc/syscall_nr.h delete mode 100644 linux-user/riscv/syscall32_nr.h delete mode 100644 linux-user/riscv/syscall64_nr.h delete mode 100644 linux-user/riscv/syscall_nr.h create mode 100644 linux-user/aarch64/syscall_64.tbl create mode 100644 linux-user/aarch64/syscallhdr.sh create mode 100644 linux-user/hexagon/meson.build create mode 100644 linux-user/hexagon/syscall.tbl create mode 100644 linux-user/hexagon/syscallhdr.sh create mode 100644 linux-user/loongarch64/syscall.tbl create mode 100644 linux-user/loongarch64/syscallhdr.sh create mode 100644 linux-user/openrisc/meson.build create mode 100644 linux-user/openrisc/syscall.tbl create mode 100644 linux-user/openrisc/syscallhdr.sh create mode 100644 linux-user/riscv/syscall.tbl create mode 100644 linux-user/riscv/syscallhdr.sh delete mode 100755 scripts/gensyscalls.sh