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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org,
	Elisha Hollander <just4now666666@gmail.com>,
	Pierrick Bouvier <pierrick.bouvier@linaro.org>
Subject: [PULL 02/31] tcg: Propagate new TCGOp to add_as_label_use
Date: Sun, 22 Sep 2024 14:00:43 +0200	[thread overview]
Message-ID: <20240922120112.5067-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240922120112.5067-1-richard.henderson@linaro.org>

The use of tcg_last_op does not interact well with
TCGContext.emit_before_op, resulting in the label
being linked to something other than the branch op.

In this case it is easier to simply collect the emitted
branch op and pass it directly to add_as_label_use.

Reported-by: Elisha Hollander <just4now666666@gmail.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/tcg-op.c | 63 ++++++++++++++++++++++++++--------------------------
 1 file changed, 32 insertions(+), 31 deletions(-)

diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 28c41b37a4..4a7e705367 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -117,9 +117,9 @@ static void DNI tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
     tcg_gen_op1(opc, tcgv_i64_arg(a1));
 }
 
-static void DNI tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
+static TCGOp * DNI tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
 {
-    tcg_gen_op1(opc, a1);
+    return tcg_gen_op1(opc, a1);
 }
 
 static void DNI tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
@@ -196,16 +196,16 @@ static void DNI tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
                 tcgv_i64_arg(a3), a4);
 }
 
-static void DNI tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
-                                  TCGArg a3, TCGArg a4)
+static TCGOp * DNI tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
+                                     TCGArg a3, TCGArg a4)
 {
-    tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4);
+    return tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4);
 }
 
-static void DNI tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
-                                  TCGArg a3, TCGArg a4)
+static TCGOp * DNI tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
+                                     TCGArg a3, TCGArg a4)
 {
-    tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4);
+    return tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4);
 }
 
 static void DNI tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
@@ -270,12 +270,12 @@ static void DNI tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6);
 }
 
-static void DNI tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
-                                  TCGv_i32 a3, TCGv_i32 a4,
-                                  TCGArg a5, TCGArg a6)
+static TCGOp * DNI tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
+                                     TCGv_i32 a3, TCGv_i32 a4,
+                                     TCGArg a5, TCGArg a6)
 {
-    tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
-                tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6);
+    return tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
+                       tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6);
 }
 
 /* Generic ops.  */
@@ -286,18 +286,17 @@ void gen_set_label(TCGLabel *l)
     tcg_gen_op1(INDEX_op_set_label, label_arg(l));
 }
 
-static void add_last_as_label_use(TCGLabel *l)
+static void add_as_label_use(TCGLabel *l, TCGOp *op)
 {
     TCGLabelUse *u = tcg_malloc(sizeof(TCGLabelUse));
 
-    u->op = tcg_last_op();
+    u->op = op;
     QSIMPLEQ_INSERT_TAIL(&l->branches, u, next);
 }
 
 void tcg_gen_br(TCGLabel *l)
 {
-    tcg_gen_op1(INDEX_op_br, label_arg(l));
-    add_last_as_label_use(l);
+    add_as_label_use(l, tcg_gen_op1(INDEX_op_br, label_arg(l)));
 }
 
 void tcg_gen_mb(TCGBar mb_type)
@@ -514,8 +513,9 @@ void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *l)
     if (cond == TCG_COND_ALWAYS) {
         tcg_gen_br(l);
     } else if (cond != TCG_COND_NEVER) {
-        tcg_gen_op4ii_i32(INDEX_op_brcond_i32, arg1, arg2, cond, label_arg(l));
-        add_last_as_label_use(l);
+        TCGOp *op = tcg_gen_op4ii_i32(INDEX_op_brcond_i32,
+                                      arg1, arg2, cond, label_arg(l));
+        add_as_label_use(l, op);
     }
 }
 
@@ -1934,15 +1934,16 @@ void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *l)
     if (cond == TCG_COND_ALWAYS) {
         tcg_gen_br(l);
     } else if (cond != TCG_COND_NEVER) {
+        TCGOp *op;
         if (TCG_TARGET_REG_BITS == 32) {
-            tcg_gen_op6ii_i32(INDEX_op_brcond2_i32, TCGV_LOW(arg1),
-                              TCGV_HIGH(arg1), TCGV_LOW(arg2),
-                              TCGV_HIGH(arg2), cond, label_arg(l));
+            op = tcg_gen_op6ii_i32(INDEX_op_brcond2_i32, TCGV_LOW(arg1),
+                                   TCGV_HIGH(arg1), TCGV_LOW(arg2),
+                                   TCGV_HIGH(arg2), cond, label_arg(l));
         } else {
-            tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond,
-                              label_arg(l));
+            op = tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond,
+                                   label_arg(l));
         }
-        add_last_as_label_use(l);
+        add_as_label_use(l, op);
     }
 }
 
@@ -1953,12 +1954,12 @@ void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *l)
     } else if (cond == TCG_COND_ALWAYS) {
         tcg_gen_br(l);
     } else if (cond != TCG_COND_NEVER) {
-        tcg_gen_op6ii_i32(INDEX_op_brcond2_i32,
-                          TCGV_LOW(arg1), TCGV_HIGH(arg1),
-                          tcg_constant_i32(arg2),
-                          tcg_constant_i32(arg2 >> 32),
-                          cond, label_arg(l));
-        add_last_as_label_use(l);
+        TCGOp *op = tcg_gen_op6ii_i32(INDEX_op_brcond2_i32,
+                                      TCGV_LOW(arg1), TCGV_HIGH(arg1),
+                                      tcg_constant_i32(arg2),
+                                      tcg_constant_i32(arg2 >> 32),
+                                      cond, label_arg(l));
+        add_as_label_use(l, op);
     }
 }
 
-- 
2.43.0



  parent reply	other threads:[~2024-09-22 12:08 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-22 12:00 [PULL 00/31] tcg + linux-user patch queue Richard Henderson
2024-09-22 12:00 ` [PULL 01/31] tcg: Return TCGOp from tcg_gen_op[1-6] Richard Henderson
2024-09-22 12:00 ` Richard Henderson [this message]
2024-09-22 12:00 ` [PULL 03/31] tcg: Fix iteration step in 32-bit gvec operation Richard Henderson
2024-09-22 12:00 ` [PULL 04/31] tcg: Export vec_gen_6 Richard Henderson
2024-09-22 12:00 ` [PULL 05/31] tcg/i386: Split out tcg_out_vex_modrm_type Richard Henderson
2024-09-22 12:00 ` [PULL 06/31] tcg/i386: Do not expand cmp_vec early Richard Henderson
2024-09-22 12:00 ` [PULL 07/31] tcg/i386: Do not expand cmpsel_vec early Richard Henderson
2024-09-22 12:00 ` [PULL 08/31] tcg/ppc: Do not expand cmp_vec early Richard Henderson
2024-09-22 12:00 ` [PULL 09/31] tcg/s390x: " Richard Henderson
2024-09-22 12:00 ` [PULL 10/31] tcg/optimize: Fold movcond with true and false values identical Richard Henderson
2024-09-22 12:00 ` [PULL 11/31] tcg/optimize: Optimize cmp_vec and cmpsel_vec Richard Henderson
2024-09-22 12:00 ` [PULL 12/31] tcg/optimize: Optimize bitsel_vec Richard Henderson
2024-09-22 12:00 ` [PULL 13/31] tcg/i386: Optimize cmpsel with constant 0 operand 3 Richard Henderson
2024-09-22 12:00 ` [PULL 14/31] tcg/i386: Implement cmp_vec with avx512 insns Richard Henderson
2024-09-22 12:00 ` [PULL 15/31] tcg/i386: Add predicate parameters to tcg_out_evex_opc Richard Henderson
2024-09-22 12:00 ` [PULL 16/31] tcg/i386: Implement cmpsel_vec with avx512 insns Richard Henderson
2024-09-22 12:00 ` [PULL 17/31] tcg/i386: Implement vector TST{EQ,NE} for avx512 Richard Henderson
2024-09-22 12:00 ` [PULL 18/31] tcg/ppc: Implement cmpsel_vec Richard Henderson
2024-09-22 12:01 ` [PULL 19/31] tcg/ppc: Optimize cmpsel with constant 0/-1 arguments Richard Henderson
2024-09-22 12:01 ` [PULL 20/31] tcg/s390x: Implement cmpsel_vec Richard Henderson
2024-09-22 12:01 ` [PULL 21/31] tcg/s390x: Optimize cmpsel with constant 0/-1 arguments Richard Henderson
2024-09-22 12:01 ` [PULL 22/31] target/ppc: Fix lxvx/stxvx facility check Richard Henderson
2024-09-22 12:01 ` [PULL 23/31] linux-user: update syscall_nr.h to Linux v6.10 Richard Henderson
2024-09-22 12:01 ` [PULL 24/31] linux-user, mips: update syscall-args-o32.c.inc " Richard Henderson
2024-09-22 12:01 ` [PULL 25/31] linux-user: update syscall.tbl " Richard Henderson
2024-09-22 12:01 ` [PULL 26/31] linux-user,aarch64: move to syscalltbl file Richard Henderson
2024-09-22 12:01 ` [PULL 27/31] linux-user,openrisc: " Richard Henderson
2024-09-22 12:01 ` [PULL 28/31] linux-user,riscv: " Richard Henderson
2024-09-22 12:01 ` [PULL 29/31] linux-user,hexagon: " Richard Henderson
2024-09-22 12:01 ` [PULL 30/31] linux-user,loongarch: " Richard Henderson
2024-09-22 12:01 ` [PULL 31/31] linux-user: update syscall.tbl to Linux v6.11 Richard Henderson
2024-09-27 15:18 ` [PULL 00/31] tcg + linux-user patch queue Peter Maydell

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