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From: Zhenzhong Duan <zhenzhong.duan@intel.com>
To: qemu-devel@nongnu.org
Cc: alex.williamson@redhat.com, clg@redhat.com,
	eric.auger@redhat.com, mst@redhat.com, peterx@redhat.com,
	jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,
	joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com,
	kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com,
	Zhenzhong Duan <zhenzhong.duan@intel.com>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Eduardo Habkost <eduardo@habkost.net>
Subject: [PATCH v4 11/17] intel_iommu: Add an internal API to find an address space with PASID
Date: Mon, 30 Sep 2024 17:26:25 +0800	[thread overview]
Message-ID: <20240930092631.2997543-12-zhenzhong.duan@intel.com> (raw)
In-Reply-To: <20240930092631.2997543-1-zhenzhong.duan@intel.com>

From: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>

This will be used to implement the device IOTLB invalidation

Signed-off-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Acked-by: Jason Wang <jasowang@redhat.com>
---
 hw/i386/intel_iommu.c | 39 ++++++++++++++++++++++++---------------
 1 file changed, 24 insertions(+), 15 deletions(-)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 289278ce30..a1596ba47d 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -70,6 +70,11 @@ struct vtd_hiod_key {
     uint8_t devfn;
 };
 
+struct vtd_as_raw_key {
+    uint16_t sid;
+    uint32_t pasid;
+};
+
 struct vtd_iotlb_key {
     uint64_t gfn;
     uint32_t pasid;
@@ -1875,29 +1880,33 @@ static inline bool vtd_is_interrupt_addr(hwaddr addr)
     return VTD_INTERRUPT_ADDR_FIRST <= addr && addr <= VTD_INTERRUPT_ADDR_LAST;
 }
 
-static gboolean vtd_find_as_by_sid(gpointer key, gpointer value,
-                                   gpointer user_data)
+static gboolean vtd_find_as_by_sid_and_pasid(gpointer key, gpointer value,
+                                             gpointer user_data)
 {
     struct vtd_as_key *as_key = (struct vtd_as_key *)key;
-    uint16_t target_sid = *(uint16_t *)user_data;
+    struct vtd_as_raw_key target = *(struct vtd_as_raw_key *)user_data;
     uint16_t sid = PCI_BUILD_BDF(pci_bus_num(as_key->bus), as_key->devfn);
-    return sid == target_sid;
+
+    return (as_key->pasid == target.pasid) &&
+           (sid == target.sid);
 }
 
-static VTDAddressSpace *vtd_get_as_by_sid(IntelIOMMUState *s, uint16_t sid)
+static VTDAddressSpace *vtd_get_as_by_sid_and_pasid(IntelIOMMUState *s,
+                                                    uint16_t sid,
+                                                    uint32_t pasid)
 {
-    uint8_t bus_num = PCI_BUS_NUM(sid);
-    VTDAddressSpace *vtd_as = s->vtd_as_cache[bus_num];
-
-    if (vtd_as &&
-        (sid == PCI_BUILD_BDF(pci_bus_num(vtd_as->bus), vtd_as->devfn))) {
-        return vtd_as;
-    }
+    struct vtd_as_raw_key key = {
+        .sid = sid,
+        .pasid = pasid
+    };
 
-    vtd_as = g_hash_table_find(s->vtd_address_spaces, vtd_find_as_by_sid, &sid);
-    s->vtd_as_cache[bus_num] = vtd_as;
+    return g_hash_table_find(s->vtd_address_spaces,
+                             vtd_find_as_by_sid_and_pasid, &key);
+}
 
-    return vtd_as;
+static VTDAddressSpace *vtd_get_as_by_sid(IntelIOMMUState *s, uint16_t sid)
+{
+    return vtd_get_as_by_sid_and_pasid(s, sid, PCI_NO_PASID);
 }
 
 static void vtd_pt_enable_fast_path(IntelIOMMUState *s, uint16_t source_id)
-- 
2.34.1



  parent reply	other threads:[~2024-09-30  9:32 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-30  9:26 [PATCH v4 00/17] intel_iommu: Enable stage-1 translation for emulated device Zhenzhong Duan
2024-09-30  9:26 ` [PATCH v4 01/17] intel_iommu: Use the latest fault reasons defined by spec Zhenzhong Duan
2024-09-30  9:26 ` [PATCH v4 02/17] intel_iommu: Make pasid entry type check accurate Zhenzhong Duan
2024-09-30  9:26 ` [PATCH v4 03/17] intel_iommu: Add a placeholder variable for scalable modern mode Zhenzhong Duan
2024-10-04  5:22   ` CLEMENT MATHIEU--DRIF
2024-11-03 14:21   ` Yi Liu
2024-09-30  9:26 ` [PATCH v4 04/17] intel_iommu: Flush stage-2 cache in PASID-selective PASID-based iotlb invalidation Zhenzhong Duan
2024-11-04  2:49   ` Yi Liu
2024-11-04  7:37     ` CLEMENT MATHIEU--DRIF
2024-11-04  8:45       ` Yi Liu
2024-11-04 11:46         ` Duan, Zhenzhong
2024-11-04 11:50           ` Michael S. Tsirkin
2024-11-04 11:55             ` Duan, Zhenzhong
2024-11-04 12:01               ` Michael S. Tsirkin
2024-11-04 12:03                 ` Duan, Zhenzhong
2024-09-30  9:26 ` [PATCH v4 05/17] intel_iommu: Rename slpte to pte Zhenzhong Duan
2024-09-30  9:26 ` [PATCH v4 06/17] intel_iommu: Implement stage-1 translation Zhenzhong Duan
2024-11-03 14:21   ` Yi Liu
2024-11-04  3:05     ` Duan, Zhenzhong
2024-11-04  7:02       ` Yi Liu
2024-09-30  9:26 ` [PATCH v4 07/17] intel_iommu: Check if the input address is canonical Zhenzhong Duan
2024-11-03 14:22   ` Yi Liu
2024-09-30  9:26 ` [PATCH v4 08/17] intel_iommu: Set accessed and dirty bits during first stage translation Zhenzhong Duan
2024-11-04  2:49   ` Yi Liu
2024-11-08  3:15   ` Jason Wang
2024-09-30  9:26 ` [PATCH v4 09/17] intel_iommu: Flush stage-1 cache in iotlb invalidation Zhenzhong Duan
2024-11-04  2:50   ` Yi Liu
2024-11-04  3:38     ` Duan, Zhenzhong
2024-11-04  7:36       ` Yi Liu
2024-09-30  9:26 ` [PATCH v4 10/17] intel_iommu: Process PASID-based " Zhenzhong Duan
2024-11-04  2:50   ` Yi Liu
2024-11-04  5:40     ` Duan, Zhenzhong
2024-11-04  7:05       ` Yi Liu
2024-09-30  9:26 ` Zhenzhong Duan [this message]
2024-11-04  2:50   ` [PATCH v4 11/17] intel_iommu: Add an internal API to find an address space with PASID Yi Liu
2024-11-04  5:47     ` Duan, Zhenzhong
2024-09-30  9:26 ` [PATCH v4 12/17] intel_iommu: Add support for PASID-based device IOTLB invalidation Zhenzhong Duan
2024-11-04  2:51   ` Yi Liu
2024-09-30  9:26 ` [PATCH v4 13/17] intel_iommu: piotlb invalidation should notify unmap Zhenzhong Duan
2024-11-04  3:05   ` Yi Liu
2024-11-04  8:15     ` Duan, Zhenzhong
2024-11-05  6:29       ` Yi Liu
2024-11-05  7:25         ` Duan, Zhenzhong
2024-11-08  4:39   ` Jason Wang
2024-09-30  9:26 ` [PATCH v4 14/17] intel_iommu: Set default aw_bits to 48 in scalable modern mode Zhenzhong Duan
2024-11-04  3:16   ` Yi Liu
2024-11-04  3:19     ` Duan, Zhenzhong
2024-11-04  7:25       ` Yi Liu
2024-11-08  4:41   ` Jason Wang
2024-11-08  5:30     ` Duan, Zhenzhong
2024-11-11  1:24       ` Jason Wang
2024-11-11  2:58         ` Duan, Zhenzhong
2024-11-11  3:03           ` Jason Wang
2024-09-30  9:26 ` [PATCH v4 15/17] intel_iommu: Introduce a property x-fls for " Zhenzhong Duan
2024-11-04  4:25   ` Yi Liu
2024-11-04  6:25     ` Duan, Zhenzhong
2024-11-04  7:23       ` Yi Liu
2024-11-05  3:11         ` Duan, Zhenzhong
2024-11-05  5:56           ` Yi Liu
2024-11-05  6:03             ` Duan, Zhenzhong
2024-11-05  6:26               ` Yi Liu
2024-09-30  9:26 ` [PATCH v4 16/17] intel_iommu: Introduce a property to control FS1GP cap bit setting Zhenzhong Duan
2024-11-04  7:00   ` Yi Liu
2024-11-08  4:45     ` Jason Wang
2024-09-30  9:26 ` [PATCH v4 17/17] tests/qtest: Add intel-iommu test Zhenzhong Duan
2024-09-30  9:52   ` Duan, Zhenzhong
2024-10-25  6:32 ` [PATCH v4 00/17] intel_iommu: Enable stage-1 translation for emulated device Duan, Zhenzhong

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