From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Thomas Huth" <thuth@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
qemu-riscv@nongnu.org,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Anton Johansson" <anjo@rev.ng>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Bin Meng" <bmeng.cn@gmail.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH] hw/riscv/spike: Replace tswap64() by ldq_endian_p()
Date: Mon, 30 Sep 2024 14:48:31 +0200 [thread overview]
Message-ID: <20240930124831.54232-1-philmd@linaro.org> (raw)
Hold the target endianness in HTIFState::target_is_bigendian.
Pass the target endianness as argument to htif_mm_init().
Replace tswap64() calls by ldq_endian_p() ones.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
Based-on: <20240930073450.33195-2-philmd@linaro.org>
"qemu/bswap: Introduce ld/st_endian_p() API"
Note: this is a non-QOM device!
---
include/hw/char/riscv_htif.h | 4 +++-
hw/char/riscv_htif.c | 17 +++++++++++------
hw/riscv/spike.c | 2 +-
3 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/include/hw/char/riscv_htif.h b/include/hw/char/riscv_htif.h
index df493fdf6b..24868ddfe1 100644
--- a/include/hw/char/riscv_htif.h
+++ b/include/hw/char/riscv_htif.h
@@ -35,6 +35,7 @@ typedef struct HTIFState {
hwaddr tohost_offset;
hwaddr fromhost_offset;
MemoryRegion mmio;
+ bool target_is_bigendian;
CharBackend chr;
uint64_t pending_read;
@@ -49,6 +50,7 @@ void htif_symbol_callback(const char *st_name, int st_info, uint64_t st_value,
/* legacy pre qom */
HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr,
- uint64_t nonelf_base, bool custom_base);
+ uint64_t nonelf_base, bool custom_base,
+ bool target_is_bigendian);
#endif
diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c
index 9bef60def1..77951f3c76 100644
--- a/hw/char/riscv_htif.c
+++ b/hw/char/riscv_htif.c
@@ -30,7 +30,6 @@
#include "qemu/timer.h"
#include "qemu/error-report.h"
#include "exec/address-spaces.h"
-#include "exec/tswap.h"
#include "sysemu/dma.h"
#include "sysemu/runstate.h"
@@ -211,13 +210,17 @@ static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written)
SHUTDOWN_CAUSE_GUEST_SHUTDOWN, exit_code);
return;
} else {
+ bool be = s->target_is_bigendian;
uint64_t syscall[8];
+
cpu_physical_memory_read(payload, syscall, sizeof(syscall));
- if (tswap64(syscall[0]) == PK_SYS_WRITE &&
- tswap64(syscall[1]) == HTIF_DEV_CONSOLE &&
- tswap64(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) {
+ if (ldq_endian_p(be, &syscall[0]) == PK_SYS_WRITE &&
+ ldq_endian_p(be, &syscall[1]) == HTIF_DEV_CONSOLE &&
+ ldq_endian_p(be, &syscall[3]) == HTIF_CONSOLE_CMD_PUTC) {
uint8_t ch;
- cpu_physical_memory_read(tswap64(syscall[2]), &ch, 1);
+
+ cpu_physical_memory_read(ldl_endian_p(be, &syscall[2]),
+ &ch, 1);
qemu_chr_fe_write(&s->chr, &ch, 1);
resp = 0x100 | (uint8_t)payload;
} else {
@@ -320,7 +323,8 @@ static const MemoryRegionOps htif_mm_ops = {
};
HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr,
- uint64_t nonelf_base, bool custom_base)
+ uint64_t nonelf_base, bool custom_base,
+ bool target_is_bigendian)
{
uint64_t base, size, tohost_offset, fromhost_offset;
@@ -345,6 +349,7 @@ HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr,
s->pending_read = 0;
s->allow_tohost = 0;
s->fromhost_inprogress = 0;
+ s->target_is_bigendian = target_is_bigendian;
qemu_chr_fe_init(&s->chr, chr, &error_abort);
qemu_chr_fe_set_handlers(&s->chr, htif_can_recv, htif_recv, htif_event,
htif_be_change, s, NULL, true);
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 64074395bc..0989cd4a41 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -327,7 +327,7 @@ static void spike_board_init(MachineState *machine)
/* initialize HTIF using symbols found in load_kernel */
htif_mm_init(system_memory, serial_hd(0), memmap[SPIKE_HTIF].base,
- htif_custom_base);
+ htif_custom_base, TARGET_BIG_ENDIAN);
}
static void spike_set_signature(Object *obj, const char *val, Error **errp)
--
2.45.2
next reply other threads:[~2024-09-30 12:49 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-30 12:48 Philippe Mathieu-Daudé [this message]
2024-10-02 14:17 ` [PATCH] hw/riscv/spike: Replace tswap64() by ldq_endian_p() Daniel Henrique Barboza
2024-10-02 14:44 ` Mark Cave-Ayland
2024-10-02 15:01 ` Daniel Henrique Barboza
2024-10-03 21:03 ` Philippe Mathieu-Daudé
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