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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Aurelien Jarno" <aurelien@aurel32.net>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	qemu-ppc@nongnu.org,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Aleksandar Rikalo" <arikalo@gmail.com>,
	"Daniel Henrique Barboza" <danielhb413@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Nicholas Piggin" <npiggin@gmail.com>,
	qemu-arm@nongnu.org, "Zhao Liu" <zhao1.liu@intel.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>
Subject: [PATCH 3/8] target/arm: Implement CPUClass::is_big_endian
Date: Fri,  4 Oct 2024 13:21:13 -0300	[thread overview]
Message-ID: <20241004162118.84570-4-philmd@linaro.org> (raw)
In-Reply-To: <20241004162118.84570-1-philmd@linaro.org>

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/arm/cpu.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 19191c23918..2bb87a9299f 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -122,6 +122,11 @@ void arm_restore_state_to_opc(CPUState *cs,
 }
 #endif /* CONFIG_TCG */
 
+static bool arm_cpu_is_big_endian(CPUState *cs)
+{
+    return arm_cpu_data_is_big_endian(cpu_env(cs));
+}
+
 /*
  * With SCTLR_ELx.NMI == 0, IRQ with Superpriority is masked identically with
  * IRQ without Superpriority. Moreover, if the GIC is configured so that
@@ -2692,6 +2697,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
                                        &acc->parent_phases);
 
     cc->class_by_name = arm_cpu_class_by_name;
+    cc->is_big_endian = arm_cpu_is_big_endian;
     cc->has_work = arm_cpu_has_work;
     cc->mmu_index = arm_cpu_mmu_index;
     cc->dump_state = arm_cpu_dump_state;
-- 
2.45.2



  parent reply	other threads:[~2024-10-04 16:22 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-04 16:21 [PATCH 0/8] hw/core/cpu: Expose cpu_is_big_endian() method Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 1/8] exec/tswap: Massage target_needs_bswap() definition Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 2/8] hw/core/cpu: Introduce CPUClass::is_big_endian() handler Philippe Mathieu-Daudé
2024-10-04 16:41   ` Peter Maydell
2024-10-04 16:53     ` Philippe Mathieu-Daudé
2024-10-04 17:01       ` Peter Maydell
2024-10-04 16:21 ` Philippe Mathieu-Daudé [this message]
2024-10-04 16:21 ` [PATCH 4/8] target/microblaze: Implement CPUClass::is_big_endian Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 5/8] target/mips: Declare mips_env_is_bigendian() in 'internal.h' Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 6/8] target/mips: Implement CPUClass::is_big_endian Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 7/8] target/ppc: Register CPUClass::is_big_endian Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 8/8] hw/core/cpu: Expose cpu_is_big_endian() method Philippe Mathieu-Daudé

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