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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: deller@kernel.org, peter.maydell@linaro.org,
	alex.bennee@linaro.org, linux-parisc@vger.kernel.org,
	qemu-arm@nongnu.org
Subject: [PATCH 16/20] target/arm: Pass MemOp to get_phys_addr_nogpc
Date: Sat,  5 Oct 2024 08:25:47 -0700	[thread overview]
Message-ID: <20241005152551.307923-17-richard.henderson@linaro.org> (raw)
In-Reply-To: <20241005152551.307923-1-richard.henderson@linaro.org>

Zero is the safe do-nothing value for callers to use.
Pass the value through from get_phys_addr_gpc and
get_phys_addr_with_space_nogpc.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/ptw.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index e92537d8f2..0445c3ccf3 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -75,7 +75,7 @@ typedef struct S1Translate {
 
 static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
                                 vaddr address,
-                                MMUAccessType access_type,
+                                MMUAccessType access_type, MemOp memop,
                                 GetPhysAddrResult *result,
                                 ARMMMUFaultInfo *fi);
 
@@ -3313,7 +3313,7 @@ static bool get_phys_addr_twostage(CPUARMState *env, S1Translate *ptw,
     ARMSecuritySpace ipa_space;
     uint64_t hcr;
 
-    ret = get_phys_addr_nogpc(env, ptw, address, access_type, result, fi);
+    ret = get_phys_addr_nogpc(env, ptw, address, access_type, 0, result, fi);
 
     /* If S1 fails, return early.  */
     if (ret) {
@@ -3339,7 +3339,7 @@ static bool get_phys_addr_twostage(CPUARMState *env, S1Translate *ptw,
     cacheattrs1 = result->cacheattrs;
     memset(result, 0, sizeof(*result));
 
-    ret = get_phys_addr_nogpc(env, ptw, ipa, access_type, result, fi);
+    ret = get_phys_addr_nogpc(env, ptw, ipa, access_type, 0, result, fi);
     fi->s2addr = ipa;
 
     /* Combine the S1 and S2 perms.  */
@@ -3406,7 +3406,7 @@ static bool get_phys_addr_twostage(CPUARMState *env, S1Translate *ptw,
 
 static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
                                       vaddr address,
-                                      MMUAccessType access_type,
+                                      MMUAccessType access_type, MemOp memop,
                                       GetPhysAddrResult *result,
                                       ARMMMUFaultInfo *fi)
 {
@@ -3547,7 +3547,8 @@ static bool get_phys_addr_gpc(CPUARMState *env, S1Translate *ptw,
                               GetPhysAddrResult *result,
                               ARMMMUFaultInfo *fi)
 {
-    if (get_phys_addr_nogpc(env, ptw, address, access_type, result, fi)) {
+    if (get_phys_addr_nogpc(env, ptw, address, access_type,
+                            memop, result, fi)) {
         return true;
     }
     if (!granule_protection_check(env, result->f.phys_addr,
@@ -3568,7 +3569,8 @@ bool get_phys_addr_with_space_nogpc(CPUARMState *env, vaddr address,
         .in_mmu_idx = mmu_idx,
         .in_space = space,
     };
-    return get_phys_addr_nogpc(env, &ptw, address, access_type, result, fi);
+    return get_phys_addr_nogpc(env, &ptw, address, access_type,
+                               memop, result, fi);
 }
 
 bool get_phys_addr(CPUARMState *env, vaddr address,
-- 
2.43.0



  parent reply	other threads:[~2024-10-05 15:31 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-05 15:25 [PATCH 00/20] accel/tcg: Introduce tlb_fill_align hook Richard Henderson
2024-10-05 15:25 ` [PATCH 01/20] accel/tcg: Assert noreturn from write-only page for atomics Richard Henderson
2024-10-05 15:25 ` [PATCH 02/20] accel/tcg: Expand tlb_fill for 3 callers Richard Henderson
2024-10-07 21:16   ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 03/20] include/exec/memop: Move get_alignment_bits from tcg.h Richard Henderson
2024-10-07 21:17   ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 04/20] include/exec/memop: Rename get_alignment_bits Richard Henderson
2024-10-07 21:18   ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 05/20] include/exec/memop: Introduce memop_atomicity_bits Richard Henderson
2024-10-05 15:25 ` [PATCH 06/20] hw/core/tcg-cpu-ops: Introduce tlb_fill_align hook Richard Henderson
2024-10-05 15:25 ` [PATCH 07/20] accel/tcg: Use the " Richard Henderson
2024-10-05 15:25 ` [PATCH 08/20] target/hppa: Add MemOp argument to hppa_get_physical_address Richard Henderson
2024-10-07 21:27   ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 09/20] target/hppa: Perform access rights before protection id check Richard Henderson
2024-10-05 15:25 ` [PATCH 10/20] target/hppa: Fix priority of T, D, and B page faults Richard Henderson
2024-10-07 21:25   ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 11/20] target/hppa: Handle alignment faults in hppa_get_physical_address Richard Henderson
2024-10-05 15:25 ` [PATCH 12/20] target/hppa: Add hppa_cpu_tlb_fill_align Richard Henderson
2024-10-05 15:25 ` [PATCH 13/20] target/arm: Pass MemOp to get_phys_addr Richard Henderson
2024-10-07 21:21   ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 14/20] target/arm: Pass MemOp to get_phys_addr_with_space_nogpc Richard Henderson
2024-10-07 21:21   ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 15/20] target/arm: Pass MemOp to get_phys_addr_gpc Richard Henderson
2024-10-07 21:21   ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` Richard Henderson [this message]
2024-10-07 21:22   ` [PATCH 16/20] target/arm: Pass MemOp to get_phys_addr_nogpc Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 17/20] target/arm: Pass MemOp through get_phys_addr_twostage Richard Henderson
2024-10-07 21:22   ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 18/20] target/arm: Pass MemOp to get_phys_addr_lpae Richard Henderson
2024-10-07 21:22   ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 19/20] target/arm: Move device detection earlier in get_phys_addr_lpae Richard Henderson
2024-10-05 15:25 ` [PATCH 20/20] target/arm: Fix alignment fault priority " Richard Henderson

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