From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: deller@kernel.org, peter.maydell@linaro.org,
alex.bennee@linaro.org, linux-parisc@vger.kernel.org,
qemu-arm@nongnu.org
Subject: [PATCH 17/20] target/arm: Pass MemOp through get_phys_addr_twostage
Date: Sat, 5 Oct 2024 08:25:48 -0700 [thread overview]
Message-ID: <20241005152551.307923-18-richard.henderson@linaro.org> (raw)
In-Reply-To: <20241005152551.307923-1-richard.henderson@linaro.org>
Pass memop through get_phys_addr_twostage with its
recursion with get_phys_addr_nogpc.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/ptw.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 0445c3ccf3..f1fca086a4 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -3301,7 +3301,7 @@ static bool get_phys_addr_disabled(CPUARMState *env,
static bool get_phys_addr_twostage(CPUARMState *env, S1Translate *ptw,
vaddr address,
- MMUAccessType access_type,
+ MMUAccessType access_type, MemOp memop,
GetPhysAddrResult *result,
ARMMMUFaultInfo *fi)
{
@@ -3313,7 +3313,8 @@ static bool get_phys_addr_twostage(CPUARMState *env, S1Translate *ptw,
ARMSecuritySpace ipa_space;
uint64_t hcr;
- ret = get_phys_addr_nogpc(env, ptw, address, access_type, 0, result, fi);
+ ret = get_phys_addr_nogpc(env, ptw, address, access_type,
+ memop, result, fi);
/* If S1 fails, return early. */
if (ret) {
@@ -3339,7 +3340,8 @@ static bool get_phys_addr_twostage(CPUARMState *env, S1Translate *ptw,
cacheattrs1 = result->cacheattrs;
memset(result, 0, sizeof(*result));
- ret = get_phys_addr_nogpc(env, ptw, ipa, access_type, 0, result, fi);
+ ret = get_phys_addr_nogpc(env, ptw, ipa, access_type,
+ memop, result, fi);
fi->s2addr = ipa;
/* Combine the S1 and S2 perms. */
@@ -3469,7 +3471,7 @@ static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
if (arm_feature(env, ARM_FEATURE_EL2) &&
!regime_translation_disabled(env, ARMMMUIdx_Stage2, ptw->in_space)) {
return get_phys_addr_twostage(env, ptw, address, access_type,
- result, fi);
+ memop, result, fi);
}
/* fall through */
--
2.43.0
next prev parent reply other threads:[~2024-10-05 15:27 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-05 15:25 [PATCH 00/20] accel/tcg: Introduce tlb_fill_align hook Richard Henderson
2024-10-05 15:25 ` [PATCH 01/20] accel/tcg: Assert noreturn from write-only page for atomics Richard Henderson
2024-10-05 15:25 ` [PATCH 02/20] accel/tcg: Expand tlb_fill for 3 callers Richard Henderson
2024-10-07 21:16 ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 03/20] include/exec/memop: Move get_alignment_bits from tcg.h Richard Henderson
2024-10-07 21:17 ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 04/20] include/exec/memop: Rename get_alignment_bits Richard Henderson
2024-10-07 21:18 ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 05/20] include/exec/memop: Introduce memop_atomicity_bits Richard Henderson
2024-10-05 15:25 ` [PATCH 06/20] hw/core/tcg-cpu-ops: Introduce tlb_fill_align hook Richard Henderson
2024-10-05 15:25 ` [PATCH 07/20] accel/tcg: Use the " Richard Henderson
2024-10-05 15:25 ` [PATCH 08/20] target/hppa: Add MemOp argument to hppa_get_physical_address Richard Henderson
2024-10-07 21:27 ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 09/20] target/hppa: Perform access rights before protection id check Richard Henderson
2024-10-05 15:25 ` [PATCH 10/20] target/hppa: Fix priority of T, D, and B page faults Richard Henderson
2024-10-07 21:25 ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 11/20] target/hppa: Handle alignment faults in hppa_get_physical_address Richard Henderson
2024-10-05 15:25 ` [PATCH 12/20] target/hppa: Add hppa_cpu_tlb_fill_align Richard Henderson
2024-10-05 15:25 ` [PATCH 13/20] target/arm: Pass MemOp to get_phys_addr Richard Henderson
2024-10-07 21:21 ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 14/20] target/arm: Pass MemOp to get_phys_addr_with_space_nogpc Richard Henderson
2024-10-07 21:21 ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 15/20] target/arm: Pass MemOp to get_phys_addr_gpc Richard Henderson
2024-10-07 21:21 ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 16/20] target/arm: Pass MemOp to get_phys_addr_nogpc Richard Henderson
2024-10-07 21:22 ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` Richard Henderson [this message]
2024-10-07 21:22 ` [PATCH 17/20] target/arm: Pass MemOp through get_phys_addr_twostage Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 18/20] target/arm: Pass MemOp to get_phys_addr_lpae Richard Henderson
2024-10-07 21:22 ` Philippe Mathieu-Daudé
2024-10-05 15:25 ` [PATCH 19/20] target/arm: Move device detection earlier in get_phys_addr_lpae Richard Henderson
2024-10-05 15:25 ` [PATCH 20/20] target/arm: Fix alignment fault priority " Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241005152551.307923-18-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=alex.bennee@linaro.org \
--cc=deller@kernel.org \
--cc=linux-parisc@vger.kernel.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).