From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: deller@kernel.org, peter.maydell@linaro.org,
alex.bennee@linaro.org, linux-parisc@vger.kernel.org,
qemu-arm@nongnu.org
Subject: [PATCH v2 21/21] target/arm: Fix alignment fault priority in get_phys_addr_lpae
Date: Sat, 5 Oct 2024 13:06:00 -0700 [thread overview]
Message-ID: <20241005200600.493604-22-richard.henderson@linaro.org> (raw)
In-Reply-To: <20241005200600.493604-1-richard.henderson@linaro.org>
Now that we have the MemOp for the access, we can order
the alignment fault caused by memory type before the
permission fault for the page.
For subsequent page hits, permission and stage 2 checks
are known to pass, and so the TLB_CHECK_ALIGNED fault
raised in generic code is not mis-ordered.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/ptw.c | 51 ++++++++++++++++++++++++++++--------------------
1 file changed, 30 insertions(+), 21 deletions(-)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 0a1a820362..dd40268397 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -2129,6 +2129,36 @@ static bool get_phys_addr_lpae(CPUARMState *env, S1Translate *ptw,
device = S1_attrs_are_device(result->cacheattrs.attrs);
}
+ /*
+ * Enable alignment checks on Device memory.
+ *
+ * Per R_XCHFJ, the correct ordering for alignment, permission,
+ * and stage 2 faults is:
+ * - Alignment fault caused by the memory type
+ * - Permission fault
+ * - A stage 2 fault on the memory access
+ * Perform the alignment check now, so that we recognize it in
+ * the correct order. Set TLB_CHECK_ALIGNED so that any subsequent
+ * softmmu tlb hit will also check the alignment; clear along the
+ * non-device path so that tlb_fill_flags is consistent in the
+ * event of restart_atomic_update.
+ *
+ * In v7, for a CPU without the Virtualization Extensions this
+ * access is UNPREDICTABLE; we choose to make it take the alignment
+ * fault as is required for a v7VE CPU. (QEMU doesn't emulate any
+ * CPUs with ARM_FEATURE_LPAE but not ARM_FEATURE_V7VE anyway.)
+ */
+ if (device) {
+ unsigned a_bits = memop_atomicity_bits(memop);
+ if (address & ((1 << a_bits) - 1)) {
+ fi->type = ARMFault_Alignment;
+ goto do_fault;
+ }
+ result->f.tlb_fill_flags = TLB_CHECK_ALIGNED;
+ } else {
+ result->f.tlb_fill_flags = 0;
+ }
+
if (!(result->f.prot & (1 << access_type))) {
fi->type = ARMFault_Permission;
goto do_fault;
@@ -2156,27 +2186,6 @@ static bool get_phys_addr_lpae(CPUARMState *env, S1Translate *ptw,
result->f.attrs.space = out_space;
result->f.attrs.secure = arm_space_is_secure(out_space);
- /*
- * Enable alignment checks on Device memory.
- *
- * Per R_XCHFJ, this check is mis-ordered. The correct ordering
- * for alignment, permission, and stage 2 faults should be:
- * - Alignment fault caused by the memory type
- * - Permission fault
- * - A stage 2 fault on the memory access
- * but due to the way the TCG softmmu TLB operates, we will have
- * implicitly done the permission check and the stage2 lookup in
- * finding the TLB entry, so the alignment check cannot be done sooner.
- *
- * In v7, for a CPU without the Virtualization Extensions this
- * access is UNPREDICTABLE; we choose to make it take the alignment
- * fault as is required for a v7VE CPU. (QEMU doesn't emulate any
- * CPUs with ARM_FEATURE_LPAE but not ARM_FEATURE_V7VE anyway.)
- */
- if (device) {
- result->f.tlb_fill_flags |= TLB_CHECK_ALIGNED;
- }
-
/*
* For FEAT_LPA2 and effective DS, the SH field in the attributes
* was re-purposed for output address bits. The SH attribute in
--
2.43.0
next prev parent reply other threads:[~2024-10-05 20:10 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-05 20:05 [PATCH v2 00/21] accel/tcg: Introduce tlb_fill_align hook Richard Henderson
2024-10-05 20:05 ` [PATCH v2 01/21] accel/tcg: Assert noreturn from write-only page for atomics Richard Henderson
2024-10-07 20:58 ` Helge Deller
2024-10-08 14:04 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 02/21] accel/tcg: Expand tlb_fill for 3 callers Richard Henderson
2024-10-07 21:01 ` Helge Deller
2024-10-08 14:04 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 03/21] include/exec/memop: Move get_alignment_bits from tcg.h Richard Henderson
2024-10-07 21:02 ` Helge Deller
2024-10-08 14:04 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 04/21] include/exec/memop: Rename get_alignment_bits Richard Henderson
2024-10-07 21:03 ` Helge Deller
2024-10-08 14:05 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 05/21] include/exec/memop: Introduce memop_atomicity_bits Richard Henderson
2024-10-07 21:04 ` Helge Deller
2024-10-08 14:05 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 06/21] hw/core/tcg-cpu-ops: Introduce tlb_fill_align hook Richard Henderson
2024-10-07 21:09 ` Helge Deller
2024-10-08 14:12 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 07/21] accel/tcg: Use the " Richard Henderson
2024-10-07 21:13 ` Helge Deller
2024-10-08 14:12 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 08/21] target/hppa: Add MemOp argument to hppa_get_physical_address Richard Henderson
2024-10-07 21:14 ` Helge Deller
2024-10-05 20:05 ` [PATCH v2 09/21] target/hppa: Perform access rights before protection id check Richard Henderson
2024-10-07 21:15 ` Helge Deller
2024-10-05 20:05 ` [PATCH v2 10/21] target/hppa: Fix priority of T, D, and B page faults Richard Henderson
2024-10-07 21:16 ` Helge Deller
2024-10-05 20:05 ` [PATCH v2 11/21] target/hppa: Handle alignment faults in hppa_get_physical_address Richard Henderson
2024-10-07 21:18 ` Helge Deller
2024-10-05 20:05 ` [PATCH v2 12/21] target/hppa: Add hppa_cpu_tlb_fill_align Richard Henderson
2024-10-07 21:19 ` Helge Deller
2024-10-05 20:05 ` [PATCH v2 13/21] target/arm: Pass MemOp to get_phys_addr Richard Henderson
2024-10-07 21:20 ` Helge Deller
2024-10-08 14:45 ` Peter Maydell
2024-10-08 17:32 ` Richard Henderson
2024-10-09 13:59 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 14/21] target/arm: Pass MemOp to get_phys_addr_with_space_nogpc Richard Henderson
2024-10-07 21:21 ` Helge Deller
2024-10-08 14:35 ` Peter Maydell
2024-10-08 17:50 ` Richard Henderson
2024-10-05 20:05 ` [PATCH v2 15/21] target/arm: Pass MemOp to get_phys_addr_gpc Richard Henderson
2024-10-07 21:21 ` Helge Deller
2024-10-08 14:26 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 16/21] target/arm: Pass MemOp to get_phys_addr_nogpc Richard Henderson
2024-10-07 21:22 ` Helge Deller
2024-10-08 14:25 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 17/21] target/arm: Pass MemOp through get_phys_addr_twostage Richard Henderson
2024-10-07 21:22 ` Helge Deller
2024-10-08 14:24 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 18/21] target/arm: Pass MemOp to get_phys_addr_lpae Richard Henderson
2024-10-07 21:23 ` Helge Deller
2024-10-08 14:24 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 19/21] target/arm: Move device detection earlier in get_phys_addr_lpae Richard Henderson
2024-10-07 21:25 ` Helge Deller
2024-10-08 14:22 ` Peter Maydell
2024-10-05 20:05 ` [PATCH v2 20/21] target/arm: Add arm_cpu_tlb_fill_align Richard Henderson
2024-10-07 21:26 ` Helge Deller
2024-10-08 14:22 ` Peter Maydell
2024-10-05 20:06 ` Richard Henderson [this message]
2024-10-08 14:23 ` [PATCH v2 21/21] target/arm: Fix alignment fault priority in get_phys_addr_lpae Peter Maydell
2024-10-07 20:55 ` [PATCH v2 00/21] accel/tcg: Introduce tlb_fill_align hook Helge Deller
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