* [PATCH 2/2] meson: ensure -mcx16 is passed when detecting ATOMIC128
2024-10-07 8:43 [PATCH v2 " Paolo Bonzini
@ 2024-10-07 8:43 ` Paolo Bonzini
2024-10-07 14:46 ` Richard Henderson
0 siblings, 1 reply; 7+ messages in thread
From: Paolo Bonzini @ 2024-10-07 8:43 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, qemu-stable, alex.bennee
Moving -mcx16 out of CPU_CFLAGS caused the detection of ATOMIC128 to
fail, because flags have to be specified by hand in cc.compiles and
cc.links invocations (why oh why??).
Ensure that these tests enable all the instruction set extensions that
will be used to build the emulators.
Fixes: c2bf2ccb266 ("configure: move -mcx16 flag out of CPU_CFLAGS", 2024-05-24)
Reported-by: Alex Bennée <alex.bennee@linaro.org>
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
meson.build | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/meson.build b/meson.build
index bbb0f6d9bcf..4ceae98ee87 100644
--- a/meson.build
+++ b/meson.build
@@ -2831,7 +2831,7 @@ config_host_data.set('CONFIG_ATOMIC64', cc.links('''
__atomic_exchange_n(&x, y, __ATOMIC_RELAXED);
__atomic_fetch_add(&x, y, __ATOMIC_RELAXED);
return 0;
- }'''))
+ }''', args: qemu_isa_flags))
has_int128_type = cc.compiles('''
__int128_t a;
@@ -2865,7 +2865,7 @@ if has_int128_type
__atomic_compare_exchange_n(&p[4], &p[5], p[6], 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED);
return 0;
}'''
- has_atomic128 = cc.links(atomic_test_128)
+ has_atomic128 = cc.links(atomic_test_128, args: qemu_isa_flags)
config_host_data.set('CONFIG_ATOMIC128', has_atomic128)
@@ -2874,7 +2874,8 @@ if has_int128_type
# without optimization enabled. Try again with optimizations locally
# enabled for the function. See
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107389
- has_atomic128_opt = cc.links('__attribute__((optimize("O1")))' + atomic_test_128)
+ has_atomic128_opt = cc.links('__attribute__((optimize("O1")))' + atomic_test_128,
+ args: qemu_isa_flags)
config_host_data.set('CONFIG_ATOMIC128_OPT', has_atomic128_opt)
if not has_atomic128_opt
@@ -2885,7 +2886,7 @@ if has_int128_type
__sync_val_compare_and_swap_16(&x, y, x);
return 0;
}
- '''))
+ ''', args: qemu_isa_flags))
endif
endif
endif
--
2.46.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] meson: ensure -mcx16 is passed when detecting ATOMIC128
2024-10-07 8:43 ` [PATCH 2/2] meson: ensure -mcx16 is passed when detecting ATOMIC128 Paolo Bonzini
@ 2024-10-07 14:46 ` Richard Henderson
0 siblings, 0 replies; 7+ messages in thread
From: Richard Henderson @ 2024-10-07 14:46 UTC (permalink / raw)
To: Paolo Bonzini, qemu-devel; +Cc: pierrick.bouvier, qemu-stable, alex.bennee
On 10/7/24 01:43, Paolo Bonzini wrote:
> Moving -mcx16 out of CPU_CFLAGS caused the detection of ATOMIC128 to
> fail, because flags have to be specified by hand in cc.compiles and
> cc.links invocations (why oh why??).
>
> Ensure that these tests enable all the instruction set extensions that
> will be used to build the emulators.
>
> Fixes: c2bf2ccb266 ("configure: move -mcx16 flag out of CPU_CFLAGS", 2024-05-24)
> Reported-by: Alex Bennée<alex.bennee@linaro.org>
> Cc:qemu-stable@nongnu.org
> Signed-off-by: Paolo Bonzini<pbonzini@redhat.com>
> ---
> meson.build | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 0/2] meson: ensure we enable CMPXCHG128 on x86_64
@ 2024-10-07 17:23 Paolo Bonzini
2024-10-07 17:23 ` [PATCH 1/2] meson: define qemu_isa_flags Paolo Bonzini
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Paolo Bonzini @ 2024-10-07 17:23 UTC (permalink / raw)
To: qemu-devel; +Cc: mjt, alex.bennee, richard.henderson
Alex discovered that CMPXCHG128 was not enabled when building for
x86_64, resulting in slow execution for wide atomic instructions,
creating a huge contention when combined with a high number of cpus
(found while booting android aarch64 guest on x86_64 host).
The problem is that even though we enable -mcx16 option for x86_64, this
is not used when testing for CMPXCHG128. Thus, we silently turn it off.
x86_64 is the only architecture adding machine flags for now, so the
problem is limited to this host architecture. However, the problem
is generic, so define a new variable for all the -m options, so that
they can be used for other such tests in the future.
Based-on: <20241004223715.1275428-1-pierrick.bouvier@linaro.org>
v2->v3: collect *-by tags
append to qemu_isa_flags instead of prepending
Paolo Bonzini (2):
meson: define qemu_isa_flags
meson: ensure -mcx16 is passed when detecting ATOMIC128
meson.build | 33 ++++++++++++++++++++-------------
1 file changed, 20 insertions(+), 13 deletions(-)
--
2.46.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] meson: define qemu_isa_flags
2024-10-07 17:23 [PATCH v3 0/2] meson: ensure we enable CMPXCHG128 on x86_64 Paolo Bonzini
@ 2024-10-07 17:23 ` Paolo Bonzini
2024-10-07 17:23 ` [PATCH 2/2] meson: ensure -mcx16 is passed when detecting ATOMIC128 Paolo Bonzini
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Paolo Bonzini @ 2024-10-07 17:23 UTC (permalink / raw)
To: qemu-devel
Cc: mjt, alex.bennee, richard.henderson, Pierrick Bouvier,
qemu-stable
Create a separate variable for compiler flags that enable
specific instruction set extensions, so that they can be used with
cc.compiles/cc.links.
Note that -mfpmath=sse is a code generation option but it does not
enable new instructions, therefore I did not make it part of
qemu_isa_flags.
Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
meson.build | 24 +++++++++++++++---------
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/meson.build b/meson.build
index 76335bb2a51..65ea45cef03 100644
--- a/meson.build
+++ b/meson.build
@@ -335,6 +335,10 @@ elif host_os == 'windows'
endif
endif
+# Choose instruction set (currently x86-only)
+
+qemu_isa_flags = []
+
# __sync_fetch_and_and requires at least -march=i486. Many toolchains
# use i686 as default anyway, but for those that don't, an explicit
# specification is necessary
@@ -351,7 +355,7 @@ if host_arch == 'i386' and not cc.links('''
sfaa(&val);
return val;
}''')
- qemu_common_flags = ['-march=i486'] + qemu_common_flags
+ qemu_isa_flags += ['-march=i486']
endif
# Pick x86-64 baseline version
@@ -367,29 +371,31 @@ if host_arch in ['i386', 'x86_64']
else
# present on basically all processors but technically not part of
# x86-64-v1, so only include -mneeded for x86-64 version 2 and above
- qemu_common_flags = ['-mcx16'] + qemu_common_flags
+ qemu_isa_flags += ['-mcx16']
endif
endif
if get_option('x86_version') >= '2'
- qemu_common_flags = ['-mpopcnt'] + qemu_common_flags
- qemu_common_flags = cc.get_supported_arguments('-mneeded') + qemu_common_flags
+ qemu_isa_flags += ['-mpopcnt']
+ qemu_isa_flags += cc.get_supported_arguments('-mneeded')
endif
if get_option('x86_version') >= '3'
- qemu_common_flags = ['-mmovbe', '-mabm', '-mbmi', '-mbmi2', '-mfma', '-mf16c'] + qemu_common_flags
+ qemu_isa_flags += ['-mmovbe', '-mabm', '-mbmi', '-mbmi2', '-mfma', '-mf16c']
endif
# add required vector instruction set (each level implies those below)
if get_option('x86_version') == '1'
- qemu_common_flags = ['-msse2'] + qemu_common_flags
+ qemu_isa_flags += ['-msse2']
elif get_option('x86_version') == '2'
- qemu_common_flags = ['-msse4.2'] + qemu_common_flags
+ qemu_isa_flags += ['-msse4.2']
elif get_option('x86_version') == '3'
- qemu_common_flags = ['-mavx2'] + qemu_common_flags
+ qemu_isa_flags += ['-mavx2']
elif get_option('x86_version') == '4'
- qemu_common_flags = ['-mavx512f', '-mavx512bw', '-mavx512cd', '-mavx512dq', '-mavx512vl'] + qemu_common_flags
+ qemu_isa_flags += ['-mavx512f', '-mavx512bw', '-mavx512cd', '-mavx512dq', '-mavx512vl']
endif
endif
+qemu_common_flags = qemu_isa_flags + qemu_common_flags
+
if get_option('prefer_static')
qemu_ldflags += get_option('b_pie') ? '-static-pie' : '-static'
endif
--
2.46.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] meson: ensure -mcx16 is passed when detecting ATOMIC128
2024-10-07 17:23 [PATCH v3 0/2] meson: ensure we enable CMPXCHG128 on x86_64 Paolo Bonzini
2024-10-07 17:23 ` [PATCH 1/2] meson: define qemu_isa_flags Paolo Bonzini
@ 2024-10-07 17:23 ` Paolo Bonzini
2024-10-07 17:37 ` [PATCH v3 0/2] meson: ensure we enable CMPXCHG128 on x86_64 Michael Tokarev
2024-10-07 19:12 ` Richard Henderson
3 siblings, 0 replies; 7+ messages in thread
From: Paolo Bonzini @ 2024-10-07 17:23 UTC (permalink / raw)
To: qemu-devel; +Cc: mjt, alex.bennee, richard.henderson, qemu-stable
Moving -mcx16 out of CPU_CFLAGS caused the detection of ATOMIC128 to
fail, because flags have to be specified by hand in cc.compiles and
cc.links invocations (why oh why??).
Ensure that these tests enable all the instruction set extensions that
will be used to build the emulators.
Fixes: c2bf2ccb266 ("configure: move -mcx16 flag out of CPU_CFLAGS", 2024-05-24)
Reported-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
meson.build | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/meson.build b/meson.build
index 65ea45cef03..e4b2af138da 100644
--- a/meson.build
+++ b/meson.build
@@ -2831,7 +2831,7 @@ config_host_data.set('CONFIG_ATOMIC64', cc.links('''
__atomic_exchange_n(&x, y, __ATOMIC_RELAXED);
__atomic_fetch_add(&x, y, __ATOMIC_RELAXED);
return 0;
- }'''))
+ }''', args: qemu_isa_flags))
has_int128_type = cc.compiles('''
__int128_t a;
@@ -2865,7 +2865,7 @@ if has_int128_type
__atomic_compare_exchange_n(&p[4], &p[5], p[6], 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED);
return 0;
}'''
- has_atomic128 = cc.links(atomic_test_128)
+ has_atomic128 = cc.links(atomic_test_128, args: qemu_isa_flags)
config_host_data.set('CONFIG_ATOMIC128', has_atomic128)
@@ -2874,7 +2874,8 @@ if has_int128_type
# without optimization enabled. Try again with optimizations locally
# enabled for the function. See
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107389
- has_atomic128_opt = cc.links('__attribute__((optimize("O1")))' + atomic_test_128)
+ has_atomic128_opt = cc.links('__attribute__((optimize("O1")))' + atomic_test_128,
+ args: qemu_isa_flags)
config_host_data.set('CONFIG_ATOMIC128_OPT', has_atomic128_opt)
if not has_atomic128_opt
@@ -2885,7 +2886,7 @@ if has_int128_type
__sync_val_compare_and_swap_16(&x, y, x);
return 0;
}
- '''))
+ ''', args: qemu_isa_flags))
endif
endif
endif
--
2.46.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v3 0/2] meson: ensure we enable CMPXCHG128 on x86_64
2024-10-07 17:23 [PATCH v3 0/2] meson: ensure we enable CMPXCHG128 on x86_64 Paolo Bonzini
2024-10-07 17:23 ` [PATCH 1/2] meson: define qemu_isa_flags Paolo Bonzini
2024-10-07 17:23 ` [PATCH 2/2] meson: ensure -mcx16 is passed when detecting ATOMIC128 Paolo Bonzini
@ 2024-10-07 17:37 ` Michael Tokarev
2024-10-07 19:12 ` Richard Henderson
3 siblings, 0 replies; 7+ messages in thread
From: Michael Tokarev @ 2024-10-07 17:37 UTC (permalink / raw)
To: Paolo Bonzini, qemu-devel; +Cc: alex.bennee, richard.henderson
07.10.2024 20:23, Paolo Bonzini wrote:
>
> Alex discovered that CMPXCHG128 was not enabled when building for
> x86_64, resulting in slow execution for wide atomic instructions,
> creating a huge contention when combined with a high number of cpus
> (found while booting android aarch64 guest on x86_64 host).
>
> The problem is that even though we enable -mcx16 option for x86_64, this
> is not used when testing for CMPXCHG128. Thus, we silently turn it off.
>
> x86_64 is the only architecture adding machine flags for now, so the
> problem is limited to this host architecture. However, the problem
> is generic, so define a new variable for all the -m options, so that
> they can be used for other such tests in the future.
>
> Based-on: <20241004223715.1275428-1-pierrick.bouvier@linaro.org>
>
> v2->v3: collect *-by tags
> append to qemu_isa_flags instead of prepending
Yeah, this now looks much better wrt the appending, thank
you for the v2!
/mjt
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 0/2] meson: ensure we enable CMPXCHG128 on x86_64
2024-10-07 17:23 [PATCH v3 0/2] meson: ensure we enable CMPXCHG128 on x86_64 Paolo Bonzini
` (2 preceding siblings ...)
2024-10-07 17:37 ` [PATCH v3 0/2] meson: ensure we enable CMPXCHG128 on x86_64 Michael Tokarev
@ 2024-10-07 19:12 ` Richard Henderson
3 siblings, 0 replies; 7+ messages in thread
From: Richard Henderson @ 2024-10-07 19:12 UTC (permalink / raw)
To: Paolo Bonzini, qemu-devel; +Cc: mjt, alex.bennee
On 10/7/24 10:23, Paolo Bonzini wrote:
> v2->v3: collect *-by tags
> append to qemu_isa_flags instead of prepending
>
> Paolo Bonzini (2):
> meson: define qemu_isa_flags
> meson: ensure -mcx16 is passed when detecting ATOMIC128
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 7+ messages in thread
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2024-10-07 17:23 ` [PATCH 2/2] meson: ensure -mcx16 is passed when detecting ATOMIC128 Paolo Bonzini
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