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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Huacai Chen" <chenhuacai@kernel.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Hervé Poussineau" <hpoussin@reactos.org>,
	"Aleksandar Rikalo" <arikalo@gmail.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH v2 15/16] hw/mips/cps: Set the vCPU 'cpu-big-endian' property
Date: Thu, 10 Oct 2024 18:50:13 -0300	[thread overview]
Message-ID: <20241010215015.44326-16-philmd@linaro.org> (raw)
In-Reply-To: <20241010215015.44326-1-philmd@linaro.org>

Have the CPS expose a 'cpu-big-endian' property so it can
set it to the vCPUs it creates.
Note, since the number of vCPUs created is dynamic, we can
not use QOM aliases.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 include/hw/mips/cps.h | 1 +
 hw/mips/cps.c         | 4 ++++
 hw/mips/malta.c       | 2 ++
 3 files changed, 7 insertions(+)

diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h
index 04d636246ab..05ef9f76b74 100644
--- a/include/hw/mips/cps.h
+++ b/include/hw/mips/cps.h
@@ -38,6 +38,7 @@ struct MIPSCPSState {
     uint32_t num_vp;
     uint32_t num_irq;
     char *cpu_type;
+    bool cpu_is_bigendian;
 
     MemoryRegion container;
     MIPSGCRState gcr;
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index 07b73b0a1f4..13046628cd2 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -77,6 +77,9 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
         MIPSCPU *cpu = MIPS_CPU(object_new(s->cpu_type));
         CPUMIPSState *env = &cpu->env;
 
+        object_property_set_bool(OBJECT(cpu), "big-endian", s->cpu_is_bigendian,
+                                 &error_abort);
+
         /* All VPs are halted on reset. Leave powering up to CPC. */
         object_property_set_bool(OBJECT(cpu), "start-powered-off", true,
                                  &error_abort);
@@ -167,6 +170,7 @@ static Property mips_cps_properties[] = {
     DEFINE_PROP_UINT32("num-vp", MIPSCPSState, num_vp, 1),
     DEFINE_PROP_UINT32("num-irq", MIPSCPSState, num_irq, 256),
     DEFINE_PROP_STRING("cpu-type", MIPSCPSState, cpu_type),
+    DEFINE_PROP_BOOL("cpu-big-endian", MIPSCPSState, cpu_is_bigendian, false),
     DEFINE_PROP_END_OF_LIST()
 };
 
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 1df00c4bf99..964d3592da7 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -1054,6 +1054,8 @@ static void create_cps(MachineState *ms, MaltaState *s,
     object_initialize_child(OBJECT(s), "cps", &s->cps, TYPE_MIPS_CPS);
     object_property_set_str(OBJECT(&s->cps), "cpu-type", ms->cpu_type,
                             &error_fatal);
+    object_property_set_bool(OBJECT(&s->cps), "cpu-big-endian",
+                             TARGET_BIG_ENDIAN, &error_abort);
     object_property_set_uint(OBJECT(&s->cps), "num-vp", ms->smp.cpus,
                             &error_fatal);
     qdev_connect_clock_in(DEVICE(&s->cps), "clk-in", s->cpuclk);
-- 
2.45.2



  parent reply	other threads:[~2024-10-10 21:52 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-10 21:49 [PATCH v2 00/16] target/mips: Remove target-specific endianness knowledge Philippe Mathieu-Daudé
2024-10-10 21:49 ` [PATCH v2 01/16] target/mips: Declare mips_env_is_bigendian() in 'internal.h' Philippe Mathieu-Daudé
2024-10-13 15:51   ` Richard Henderson
2024-10-10 21:50 ` [PATCH v2 02/16] target/mips: Rename cpu_is_bigendian() -> disas_is_bigendian() Philippe Mathieu-Daudé
2024-10-13 15:52   ` Richard Henderson
2024-10-10 21:50 ` [PATCH v2 03/16] target/mips: Introduce mo_endian_env() helper Philippe Mathieu-Daudé
2024-10-13 15:52   ` Richard Henderson
2024-10-10 21:50 ` [PATCH v2 04/16] target/mips: Replace MO_TE by mo_endian_env() in get_pte() Philippe Mathieu-Daudé
2024-10-13 15:53   ` Richard Henderson
2024-10-10 21:50 ` [PATCH v2 05/16] target/mips: Convert mips16e decr_and_load/store() macros to functions Philippe Mathieu-Daudé
2024-10-10 21:50 ` [PATCH v2 06/16] target/mips: Factor mo_endian_rev() out of MXU code Philippe Mathieu-Daudé
2024-10-13 15:59   ` Richard Henderson
2024-10-10 21:50 ` [PATCH v2 07/16] target/mips: Explode MO_TExx -> MO_TE | MO_xx Philippe Mathieu-Daudé
2024-10-13 16:00   ` Richard Henderson
2024-10-10 21:50 ` [PATCH v2 08/16] target/mips: Rename unused sysemu argument of OP_LD_ATOMIC() Philippe Mathieu-Daudé
2024-10-13 16:01   ` Richard Henderson
2024-10-10 21:50 ` [PATCH v2 09/16] target/mips: Introduce mo_endian() helper Philippe Mathieu-Daudé
2024-10-13 16:01   ` Richard Henderson
2024-10-10 21:50 ` [PATCH v2 10/16] target/mips: Replace MO_TE by mo_endian() Philippe Mathieu-Daudé
2024-10-13 16:05   ` Richard Henderson
2024-10-14 22:18     ` Philippe Mathieu-Daudé
2024-10-14 23:13       ` Richard Henderson
2024-10-15 14:45         ` Philippe Mathieu-Daudé
2024-10-10 21:50 ` [PATCH v2 11/16] target/mips: Have gen_addiupc() expand $pc during translation Philippe Mathieu-Daudé
2024-10-13 16:06   ` Richard Henderson
2024-10-10 21:50 ` [PATCH v2 12/16] target/mips: Use gen_op_addr_addi() when possible Philippe Mathieu-Daudé
2024-10-13 16:11   ` Richard Henderson
2024-10-10 21:50 ` [PATCH v2 13/16] target/mips: Use tcg_constant_tl() instead of tcg_gen_movi_tl() Philippe Mathieu-Daudé
2024-10-10 21:50 ` [PATCH v2 14/16] target/mips: Expose MIPSCPU::is_big_endian property Philippe Mathieu-Daudé
2024-10-13 16:14   ` Richard Henderson
2024-10-10 21:50 ` Philippe Mathieu-Daudé [this message]
2024-10-13 16:58   ` [PATCH v2 15/16] hw/mips/cps: Set the vCPU 'cpu-big-endian' property Richard Henderson
2024-10-10 21:50 ` [PATCH v2 16/16] hw/mips: Have mips_cpu_create_with_clock() take an endianness argument Philippe Mathieu-Daudé
2024-10-13 17:00   ` Richard Henderson

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