From: Zhao Liu <zhao1.liu@intel.com>
To: "Daniel P . Berrangé" <berrange@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Eric Blake" <eblake@redhat.com>,
"Markus Armbruster" <armbru@redhat.com>,
"Marcelo Tosatti" <mtosatti@redhat.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
"Sia Jee Heng" <jeeheng.sia@starfivetech.com>,
"Alireza Sanaee" <alireza.sanaee@huawei.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
Zhenyu Wang <zhenyu.z.wang@intel.com>,
Dapeng Mi <dapeng1.mi@linux.intel.com>,
Zhao Liu <zhao1.liu@intel.com>, Yongwei Ma <yongwei.ma@intel.com>
Subject: [PATCH v4 4/9] hw/core: Check smp cache topology support for machine
Date: Tue, 22 Oct 2024 21:51:46 +0800 [thread overview]
Message-ID: <20241022135151.2052198-5-zhao1.liu@intel.com> (raw)
In-Reply-To: <20241022135151.2052198-1-zhao1.liu@intel.com>
Add cache_supported flags in SMPCompatProps to allow machines to
configure various caches support.
And check the compatibility of the cache properties with the
machine support in machine_parse_smp_cache().
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Tested-by: Yongwei Ma <yongwei.ma@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
Changes since Patch v3:
* Dropped cache level check because if some fields is marked as
default, then we can't guarentee the hierarchies are correct.
(Daniel)
---
hw/core/machine-smp.c | 41 +++++++++++++++++++++++++++++++++++++++++
include/hw/boards.h | 3 +++
2 files changed, 44 insertions(+)
diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c
index c6d90cd6d413..ebb7a134a7be 100644
--- a/hw/core/machine-smp.c
+++ b/hw/core/machine-smp.c
@@ -261,10 +261,32 @@ void machine_parse_smp_config(MachineState *ms,
}
}
+static bool machine_check_topo_support(MachineState *ms,
+ CpuTopologyLevel topo,
+ Error **errp)
+{
+ MachineClass *mc = MACHINE_GET_CLASS(ms);
+
+ if ((topo == CPU_TOPOLOGY_LEVEL_MODULE && !mc->smp_props.modules_supported) ||
+ (topo == CPU_TOPOLOGY_LEVEL_CLUSTER && !mc->smp_props.clusters_supported) ||
+ (topo == CPU_TOPOLOGY_LEVEL_DIE && !mc->smp_props.dies_supported) ||
+ (topo == CPU_TOPOLOGY_LEVEL_BOOK && !mc->smp_props.books_supported) ||
+ (topo == CPU_TOPOLOGY_LEVEL_DRAWER && !mc->smp_props.drawers_supported)) {
+ error_setg(errp,
+ "Invalid topology level: %s. "
+ "The topology level is not supported by this machine",
+ CpuTopologyLevel_str(topo));
+ return false;
+ }
+
+ return true;
+}
+
bool machine_parse_smp_cache(MachineState *ms,
const SmpCachePropertiesList *caches,
Error **errp)
{
+ MachineClass *mc = MACHINE_GET_CLASS(ms);
const SmpCachePropertiesList *node;
DECLARE_BITMAP(caches_bitmap, CACHE_LEVEL_AND_TYPE__MAX);
@@ -283,6 +305,25 @@ bool machine_parse_smp_cache(MachineState *ms,
set_bit(node->value->cache, caches_bitmap);
}
+ for (int i = 0; i < CACHE_LEVEL_AND_TYPE__MAX; i++) {
+ const SmpCacheProperties *props = &ms->smp_cache.props[i];
+
+ /*
+ * Reject non "default" topology level if the cache isn't
+ * supported by the machine.
+ */
+ if (props->topology != CPU_TOPOLOGY_LEVEL_DEFAULT &&
+ !mc->smp_props.cache_supported[props->cache]) {
+ error_setg(errp,
+ "%s cache topology not supported by this machine",
+ CacheLevelAndType_str(node->value->cache));
+ return false;
+ }
+
+ if (!machine_check_topo_support(ms, props->topology, errp)) {
+ return false;
+ }
+ }
return true;
}
diff --git a/include/hw/boards.h b/include/hw/boards.h
index f7591d54a3d3..3d6cb5acd6c7 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -153,6 +153,8 @@ typedef struct {
* @books_supported - whether books are supported by the machine
* @drawers_supported - whether drawers are supported by the machine
* @modules_supported - whether modules are supported by the machine
+ * @cache_supported - whether cache (l1d, l1i, l2 and l3) configuration are
+ * supported by the machine
*/
typedef struct {
bool prefer_sockets;
@@ -162,6 +164,7 @@ typedef struct {
bool books_supported;
bool drawers_supported;
bool modules_supported;
+ bool cache_supported[CACHE_LEVEL_AND_TYPE__MAX];
} SMPCompatProps;
/**
--
2.34.1
next prev parent reply other threads:[~2024-10-22 13:37 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-22 13:51 [PATCH v4 0/9] Introduce SMP Cache Topology Zhao Liu
2024-10-22 13:51 ` [PATCH v4 1/9] i386/cpu: Don't enumerate the "invalid" CPU topology level Zhao Liu
2024-10-22 14:43 ` Jonathan Cameron via
2024-10-22 13:51 ` [PATCH v4 2/9] hw/core: Make CPU topology enumeration arch-agnostic Zhao Liu
2024-10-29 20:10 ` Philippe Mathieu-Daudé
2024-11-01 2:38 ` Zhao Liu
2024-11-01 7:47 ` Zhao Liu
2024-10-22 13:51 ` [PATCH v4 3/9] qapi/qom: Define cache enumeration and properties for machine Zhao Liu
2024-10-22 13:51 ` Zhao Liu [this message]
2024-10-22 13:51 ` [PATCH v4 5/9] hw/core: Add a helper to check the cache topology level Zhao Liu
2024-10-22 14:44 ` Jonathan Cameron via
2024-10-22 13:51 ` [PATCH v4 6/9] i386/cpu: Support thread and module level cache topology Zhao Liu
2024-10-22 13:51 ` [PATCH v4 7/9] i386/cpu: Update cache topology with machine's configuration Zhao Liu
2024-10-22 13:51 ` [PATCH v4 8/9] i386/pc: Support cache topology in -machine for PC machine Zhao Liu
2024-10-22 13:51 ` [PATCH v4 9/9] i386/cpu: add has_caches flag to check smp_cache configuration Zhao Liu
2024-10-28 9:07 ` [PATCH v4 0/9] Introduce SMP Cache Topology Zhao Liu
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