From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [PATCH] target/i386/hvf: hide MPX states from XCR0
Date: Tue, 29 Oct 2024 14:04:01 +0100 [thread overview]
Message-ID: <20241029130401.525297-1-pbonzini@redhat.com> (raw)
QEMU does not show availability of MPX in CPUID when running under
Hypervisor.framework. Therefore, in the unlikely chance that the host
has MPX enabled, hide those bits from leaf 0xD as well.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/hvf/x86_cpuid.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c
index e56cd8411ba..4b184767f4a 100644
--- a/target/i386/hvf/x86_cpuid.c
+++ b/target/i386/hvf/x86_cpuid.c
@@ -110,9 +110,9 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
if (idx == 0) {
uint64_t host_xcr0;
if (xgetbv(ecx, 0, &host_xcr0)) {
+ /* Only show xcr0 bits corresponding to usable features. */
uint64_t supp_xcr0 = host_xcr0 & (XSTATE_FP_MASK |
XSTATE_SSE_MASK | XSTATE_YMM_MASK |
- XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK |
XSTATE_OPMASK_MASK | XSTATE_ZMM_Hi256_MASK |
XSTATE_Hi16_ZMM_MASK);
eax &= supp_xcr0;
--
2.47.0
next reply other threads:[~2024-10-29 13:04 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-29 13:04 Paolo Bonzini [this message]
2024-10-30 12:30 ` [PATCH] target/i386/hvf: hide MPX states from XCR0 Phil Dennis-Jordan
2024-10-30 13:35 ` Paolo Bonzini
2024-10-30 15:24 ` Phil Dennis-Jordan
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