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From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Cleber Rosa" <crosa@redhat.com>,
	qemu-riscv@nongnu.org,
	"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
	"Mahmoud Mandour" <ma.mandourr@gmail.com>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"John Snow" <jsnow@redhat.com>,
	"Stefano Garzarella" <sgarzare@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Marc-André Lureau" <marcandre.lureau@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Weiwei Li" <liwei1518@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Konstantin Kostiuk" <kkostiuk@redhat.com>,
	"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	"Bin Meng" <bmeng.cn@gmail.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Alexandre Iooss" <erdnaxe@crans.org>,
	"Michael Roth" <michael.roth@amd.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Daniel P. Berrangé" <berrange@redhat.com>,
	"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>
Subject: [PATCH] hw/riscv: fix build error with clang
Date: Fri,  1 Nov 2024 10:08:33 -0700	[thread overview]
Message-ID: <20241101170833.1074954-1-pierrick.bouvier@linaro.org> (raw)

Introduced in 0c54ac, "hw/riscv: add RISC-V IOMMU base emulation"

../hw/riscv/riscv-iommu.c:187:17: error: redefinition of '_pext_u64'

  187 | static uint64_t _pext_u64(uint64_t val, uint64_t ext)

      |                 ^

D:/a/_temp/msys64/clang64/lib/clang/18/include/bmi2intrin.h:217:1: note: previous definition is here

  217 | _pext_u64(unsigned long long __X, unsigned long long __Y)

      | ^

Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
 hw/riscv/riscv-iommu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
index feb650549ac..f738570bac2 100644
--- a/hw/riscv/riscv-iommu.c
+++ b/hw/riscv/riscv-iommu.c
@@ -184,7 +184,7 @@ static void riscv_iommu_pri(RISCVIOMMUState *s,
 }
 
 /* Portable implementation of pext_u64, bit-mask extraction. */
-static uint64_t _pext_u64(uint64_t val, uint64_t ext)
+static uint64_t pext_u64(uint64_t val, uint64_t ext)
 {
     uint64_t ret = 0;
     uint64_t rot = 1;
@@ -528,7 +528,7 @@ static MemTxResult riscv_iommu_msi_write(RISCVIOMMUState *s,
     int cause;
 
     /* Interrupt File Number */
-    intn = _pext_u64(PPN_DOWN(gpa), ctx->msi_addr_mask);
+    intn = pext_u64(PPN_DOWN(gpa), ctx->msi_addr_mask);
     if (intn >= 256) {
         /* Interrupt file number out of range */
         res = MEMTX_ACCESS_ERROR;
-- 
2.39.5



             reply	other threads:[~2024-11-01 17:09 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-01 17:08 Pierrick Bouvier [this message]
2024-11-01 17:35 ` [PATCH] hw/riscv: fix build error with clang Daniel Henrique Barboza
2024-11-01 17:38   ` Daniel Henrique Barboza
2024-11-01 17:48   ` Peter Maydell
2024-11-01 18:04     ` Pierrick Bouvier
2024-11-01 18:13     ` Daniel Henrique Barboza
2024-11-01 18:49       ` Peter Maydell
2024-11-01 19:23         ` Tomasz Jeznach
2024-11-01 20:46           ` Daniel Henrique Barboza
2024-11-01 20:52             ` Pierrick Bouvier
2024-11-02 13:09             ` Peter Maydell
2024-11-01 18:05   ` Pierrick Bouvier
2024-11-04 22:23 ` Pierrick Bouvier

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