From: Dongli Zhang <dongli.zhang@oracle.com>
To: qemu-devel@nongnu.org, kvm@vger.kernel.org
Cc: pbonzini@redhat.com, mtosatti@redhat.com, sandipan.das@amd.com,
babu.moger@amd.com, zhao1.liu@intel.com, likexu@tencent.com,
like.xu.linux@gmail.com, zhenyuw@linux.intel.com, groug@kaod.org,
lyan@digitalocean.com, khorenko@virtuozzo.com,
alexander.ivanov@virtuozzo.com, den@virtuozzo.com,
joe.jin@oracle.com, davydov-max@yandex-team.ru
Subject: [PATCH 2/7] target/i386/kvm: introduce 'pmu-cap-disabled' to set KVM_PMU_CAP_DISABLE
Date: Mon, 4 Nov 2024 01:40:17 -0800 [thread overview]
Message-ID: <20241104094119.4131-3-dongli.zhang@oracle.com> (raw)
In-Reply-To: <20241104094119.4131-1-dongli.zhang@oracle.com>
The AMD PMU virtualization is not disabled when configuring
"-cpu host,-pmu" in the QEMU command line on an AMD server. Neither
"-cpu host,-pmu" nor "-cpu EPYC" effectively disables AMD PMU
virtualization in such an environment.
As a result, VM logs typically show:
[ 0.510611] Performance Events: Fam17h+ core perfctr, AMD PMU driver.
whereas the expected logs should be:
[ 0.596381] Performance Events: PMU not available due to virtualization, using software events only.
[ 0.600972] NMI watchdog: Perf NMI watchdog permanently disabled
This discrepancy occurs because AMD PMU does not use CPUID to determine
whether PMU virtualization is supported.
To address this, we introduce a new property, 'pmu-cap-disabled', for KVM
acceleration. This property sets KVM_PMU_CAP_DISABLE if
KVM_CAP_PMU_CAPABILITY is supported. Note that this feature currently
supports only x86 hosts, as KVM_CAP_PMU_CAPABILITY is used exclusively for
x86 systems.
Signed-off-by: Dongli Zhang <dongli.zhang@oracle.com>
---
Another previous solution to re-use '-cpu host,-pmu':
https://lore.kernel.org/all/20221119122901.2469-1-dongli.zhang@oracle.com/
accel/kvm/kvm-all.c | 1 +
include/sysemu/kvm_int.h | 1 +
qemu-options.hx | 9 ++++++-
target/i386/cpu.c | 2 +-
target/i386/kvm/kvm.c | 52 ++++++++++++++++++++++++++++++++++++++
target/i386/kvm/kvm_i386.h | 2 ++
6 files changed, 65 insertions(+), 2 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 801cff16a5..8b5ba45cf7 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -3933,6 +3933,7 @@ static void kvm_accel_instance_init(Object *obj)
s->xen_evtchn_max_pirq = 256;
s->device = NULL;
s->msr_energy.enable = false;
+ s->pmu_cap_disabled = false;
}
/**
diff --git a/include/sysemu/kvm_int.h b/include/sysemu/kvm_int.h
index a1e72763da..cdee1a481c 100644
--- a/include/sysemu/kvm_int.h
+++ b/include/sysemu/kvm_int.h
@@ -166,6 +166,7 @@ struct KVMState
uint16_t xen_gnttab_max_frames;
uint16_t xen_evtchn_max_pirq;
char *device;
+ bool pmu_cap_disabled;
};
void kvm_memory_listener_register(KVMState *s, KVMMemoryListener *kml,
diff --git a/qemu-options.hx b/qemu-options.hx
index dacc9790a4..9684424835 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -191,7 +191,8 @@ DEF("accel", HAS_ARG, QEMU_OPTION_accel,
" eager-split-size=n (KVM Eager Page Split chunk size, default 0, disabled. ARM only)\n"
" notify-vmexit=run|internal-error|disable,notify-window=n (enable notify VM exit and set notify window, x86 only)\n"
" thread=single|multi (enable multi-threaded TCG)\n"
- " device=path (KVM device path, default /dev/kvm)\n", QEMU_ARCH_ALL)
+ " device=path (KVM device path, default /dev/kvm)\n"
+ " pmu-cap-disabled=true|false (disable KVM_CAP_PMU_CAPABILITY, x86 only, default false)\n", QEMU_ARCH_ALL)
SRST
``-accel name[,prop=value[,...]]``
This is used to enable an accelerator. Depending on the target
@@ -277,6 +278,12 @@ SRST
option can be used to pass the KVM device to use via a file descriptor
by setting the value to ``/dev/fdset/NN``.
+ ``pmu-cap-disabled=true|false``
+ When using the KVM accelerator, it controls the disabling of
+ KVM_CAP_PMU_CAPABILITY via KVM_PMU_CAP_DISABLE. When this capability is
+ disabled, PMU virtualization is turned off at the KVM module level.
+ Note that this functionality is supported for x86 hosts only.
+
ERST
DEF("smp", HAS_ARG, QEMU_OPTION_smp,
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 4490a7a8d6..c97ed74a47 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -7102,7 +7102,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
case 0x80000022:
*eax = *ebx = *ecx = *edx = 0;
/* AMD Extended Performance Monitoring and Debug */
- if (kvm_enabled() && cpu->enable_pmu &&
+ if (kvm_enabled() && cpu->enable_pmu && !kvm_pmu_cap_disabled() &&
(env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_PERFCORE) &&
(env->features[FEAT_8000_0022_EAX] & CPUID_8000_0022_EAX_PERFMON_V2)) {
*eax |= CPUID_8000_0022_EAX_PERFMON_V2;
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 8e17942c3b..ed73b1e7e0 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -166,6 +166,7 @@ static bool has_msr_vmx_procbased_ctls2;
static bool has_msr_perf_capabs;
static bool has_msr_pkrs;
static bool has_msr_hwcr;
+static bool has_pmu_cap;
static uint32_t has_architectural_pmu_version;
static uint32_t num_architectural_pmu_gp_counters;
@@ -3196,6 +3197,11 @@ static void kvm_vm_enable_energy_msrs(KVMState *s)
return;
}
+bool kvm_pmu_cap_disabled(void)
+{
+ return kvm_state->pmu_cap_disabled;
+}
+
int kvm_arch_init(MachineState *ms, KVMState *s)
{
int ret;
@@ -3335,6 +3341,23 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
}
}
+ has_pmu_cap = kvm_check_extension(s, KVM_CAP_PMU_CAPABILITY);
+
+ if (s->pmu_cap_disabled) {
+ if (has_pmu_cap) {
+ ret = kvm_vm_enable_cap(s, KVM_CAP_PMU_CAPABILITY, 0,
+ KVM_PMU_CAP_DISABLE);
+ if (ret < 0) {
+ s->pmu_cap_disabled = false;
+ error_report("kvm: Failed to disable pmu cap: %s",
+ strerror(-ret));
+ }
+ } else {
+ s->pmu_cap_disabled = false;
+ error_report("kvm: KVM_CAP_PMU_CAPABILITY is not supported");
+ }
+ }
+
return 0;
}
@@ -6525,6 +6548,29 @@ static void kvm_arch_set_xen_evtchn_max_pirq(Object *obj, Visitor *v,
s->xen_evtchn_max_pirq = value;
}
+static void kvm_set_pmu_cap_disabled(Object *obj, Visitor *v,
+ const char *name, void *opaque,
+ Error **errp)
+{
+ KVMState *s = KVM_STATE(obj);
+ bool pmu_cap_disabled;
+ Error *error = NULL;
+
+ if (s->fd != -1) {
+ error_setg(errp, "Cannot set properties after the accelerator has "
+ "been initialized");
+ return;
+ }
+
+ visit_type_bool(v, name, &pmu_cap_disabled, &error);
+ if (error) {
+ error_propagate(errp, error);
+ return;
+ }
+
+ s->pmu_cap_disabled = pmu_cap_disabled;
+}
+
void kvm_arch_accel_class_init(ObjectClass *oc)
{
object_class_property_add_enum(oc, "notify-vmexit", "NotifyVMexitOption",
@@ -6564,6 +6610,12 @@ void kvm_arch_accel_class_init(ObjectClass *oc)
NULL, NULL);
object_class_property_set_description(oc, "xen-evtchn-max-pirq",
"Maximum number of Xen PIRQs");
+
+ object_class_property_add(oc, "pmu-cap-disabled", "bool",
+ NULL, kvm_set_pmu_cap_disabled,
+ NULL, NULL);
+ object_class_property_set_description(oc, "pmu-cap-disabled",
+ "Disable KVM_CAP_PMU_CAPABILITY");
}
void kvm_set_max_apic_id(uint32_t max_apic_id)
diff --git a/target/i386/kvm/kvm_i386.h b/target/i386/kvm/kvm_i386.h
index 9de9c0d303..03522de9d1 100644
--- a/target/i386/kvm/kvm_i386.h
+++ b/target/i386/kvm/kvm_i386.h
@@ -49,6 +49,8 @@ uint64_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index);
void kvm_set_max_apic_id(uint32_t max_apic_id);
void kvm_request_xsave_components(X86CPU *cpu, uint64_t mask);
+bool kvm_pmu_cap_disabled(void);
+
#ifdef CONFIG_KVM
bool kvm_is_vm_type_supported(int type);
--
2.39.3
next prev parent reply other threads:[~2024-11-04 9:42 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-04 9:40 [PATCH 0/7] target/i386/kvm/pmu: Enhancement, Bugfix and Cleanup Dongli Zhang
2024-11-04 9:40 ` [PATCH 1/7] target/i386: disable PerfMonV2 when PERFCORE unavailable Dongli Zhang
2024-11-06 3:54 ` Zhao Liu
2024-11-07 0:29 ` dongli.zhang
2024-11-07 7:57 ` Zhao Liu
2024-11-04 9:40 ` Dongli Zhang [this message]
2024-11-07 7:52 ` [PATCH 2/7] target/i386/kvm: introduce 'pmu-cap-disabled' to set KVM_PMU_CAP_DISABLE Zhao Liu
2024-11-07 23:44 ` dongli.zhang
2024-11-08 2:32 ` Zhao Liu
2024-11-08 12:52 ` Sandipan Das
2024-11-13 17:15 ` Zhao Liu
2024-11-14 0:13 ` dongli.zhang
2024-11-21 10:06 ` Mi, Dapeng
2025-02-07 9:52 ` Mi, Dapeng
2025-02-09 20:12 ` dongli.zhang
2025-02-10 8:04 ` Mi, Dapeng
2024-11-04 9:40 ` [PATCH 3/7] target/i386/kvm: init PMU information only once Dongli Zhang
2024-11-10 15:29 ` Zhao Liu
2024-11-13 1:50 ` dongli.zhang
2024-11-13 16:48 ` Zhao Liu
2024-11-04 9:40 ` [PATCH 4/7] target/i386/kvm: rename architectural PMU variables Dongli Zhang
2024-11-04 9:40 ` [PATCH 5/7] target/i386/kvm: reset AMD PMU registers during VM reset Dongli Zhang
2024-11-06 9:58 ` Sandipan Das
2024-11-07 0:33 ` dongli.zhang
2024-11-07 21:00 ` Maksim Davydov
2024-11-08 1:19 ` dongli.zhang
2024-11-08 14:07 ` Maksim Davydov
2024-11-08 18:04 ` dongli.zhang
2024-11-04 9:40 ` [PATCH 6/7] target/i386/kvm: support perfmon-v2 for reset Dongli Zhang
2024-11-08 13:09 ` Sandipan Das
2024-11-08 16:55 ` dongli.zhang
2024-11-04 9:40 ` [PATCH 7/7] target/i386/kvm: don't stop Intel PMU counters Dongli Zhang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241104094119.4131-3-dongli.zhang@oracle.com \
--to=dongli.zhang@oracle.com \
--cc=alexander.ivanov@virtuozzo.com \
--cc=babu.moger@amd.com \
--cc=davydov-max@yandex-team.ru \
--cc=den@virtuozzo.com \
--cc=groug@kaod.org \
--cc=joe.jin@oracle.com \
--cc=khorenko@virtuozzo.com \
--cc=kvm@vger.kernel.org \
--cc=like.xu.linux@gmail.com \
--cc=likexu@tencent.com \
--cc=lyan@digitalocean.com \
--cc=mtosatti@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=sandipan.das@amd.com \
--cc=zhao1.liu@intel.com \
--cc=zhenyuw@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).