From: "Cédric Le Goater" <clg@redhat.com>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PULL 06/10] hw/timer/aspeed: Fix coding style
Date: Mon, 4 Nov 2024 11:14:57 +0100 [thread overview]
Message-ID: <20241104101501.2487001-7-clg@redhat.com> (raw)
In-Reply-To: <20241104101501.2487001-1-clg@redhat.com>
From: Jamin Lin <jamin_lin@aspeedtech.com>
Fix coding style issues from checkpatch.pl
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
hw/timer/aspeed_timer.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c
index b1f860ecfb80..5af268ea9ebc 100644
--- a/hw/timer/aspeed_timer.c
+++ b/hw/timer/aspeed_timer.c
@@ -276,7 +276,8 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg,
old_reload = t->reload;
t->reload = calculate_min_ticks(t, value);
- /* If the reload value was not previously set, or zero, and
+ /*
+ * If the reload value was not previously set, or zero, and
* the current value is valid, try to start the timer if it is
* enabled.
*/
@@ -312,7 +313,8 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg,
}
}
-/* Control register operations are broken out into helpers that can be
+/*
+ * Control register operations are broken out into helpers that can be
* explicitly called on aspeed_timer_reset(), but also from
* aspeed_timer_ctrl_op().
*/
@@ -396,7 +398,8 @@ static void aspeed_timer_set_ctrl(AspeedTimerCtrlState *s, uint32_t reg)
AspeedTimer *t;
const uint8_t enable_mask = BIT(op_enable);
- /* Handle a dependency between the 'enable' and remaining three
+ /*
+ * Handle a dependency between the 'enable' and remaining three
* configuration bits - i.e. if more than one bit in the control set has
* changed, including the 'enable' bit, then we want either disable the
* timer and perform configuration, or perform configuration and then
@@ -582,7 +585,6 @@ static void aspeed_2600_timer_write(AspeedTimerCtrlState *s, hwaddr offset,
case 0x3C:
aspeed_timer_set_ctrl(s, s->ctrl & ~tv);
break;
-
case 0x38:
default:
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIx "\n",
@@ -623,7 +625,8 @@ static void aspeed_timer_reset(DeviceState *dev)
for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
AspeedTimer *t = &s->timers[i];
- /* Explicitly call helpers to avoid any conditional behaviour through
+ /*
+ * Explicitly call helpers to avoid any conditional behaviour through
* aspeed_timer_set_ctrl().
*/
aspeed_timer_ctrl_enable(t, false);
--
2.47.0
next prev parent reply other threads:[~2024-11-04 10:16 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-04 10:14 [PULL 00/10] aspeed queue Cédric Le Goater
2024-11-04 10:14 ` [PULL 01/10] hw/arm: enable at24c with aspeed Cédric Le Goater
2024-11-04 10:14 ` [PULL 02/10] hw/sd/sdcard: Fix calculation of size when using eMMC boot partitions Cédric Le Goater
2024-11-04 10:14 ` [PULL 03/10] hw/arm/aspeed_ast27x0: Use bsa.h for PPI definitions Cédric Le Goater
2024-11-04 10:14 ` [PULL 04/10] hw/arm/aspeed_ast27x0: Avoid hardcoded '256' in IRQ calculation Cédric Le Goater
2024-11-04 10:14 ` [PULL 05/10] aspeed/soc: Support RTC for AST2700 Cédric Le Goater
2024-11-04 10:14 ` Cédric Le Goater [this message]
2024-11-04 10:14 ` [PULL 07/10] hw/timer/aspeed: Fix interrupt status does not be cleared for AST2600 Cédric Le Goater
2024-11-04 10:14 ` [PULL 08/10] hw/sd/aspeed_sdhci: Introduce Capabilities Register 2 for SD slot 0 and 1 Cédric Le Goater
2024-11-04 10:15 ` [PULL 09/10] aspeed: Support create flash devices via command line for AST1030 Cédric Le Goater
2024-11-04 10:15 ` [PULL 10/10] aspeed: Don't set always boot properties of the emmc device Cédric Le Goater
2024-11-04 10:38 ` [PULL 00/10] aspeed queue Cédric Le Goater
2024-11-05 14:22 ` Peter Maydell
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