From: Zhenzhong Duan <zhenzhong.duan@intel.com>
To: qemu-devel@nongnu.org
Cc: mst@redhat.com, jasowang@redhat.com, yi.l.liu@intel.com,
clement.mathieu--drif@eviden.com, chao.p.peng@intel.com,
Zhenzhong Duan <zhenzhong.duan@intel.com>
Subject: [PATCH 0/3] intel_iommu: Add missed sanity check for invalidae descriptor
Date: Mon, 4 Nov 2024 20:55:33 +0800 [thread overview]
Message-ID: <20241104125536.1236118-1-zhenzhong.duan@intel.com> (raw)
Hi,
This adds missed sanity check when IQ size is 256-bit per Yi's suggestion,
see patch for details.
I don't add check for VTD_INV_DESC_PC and VTD_INV_DESC_PIOTLB, will do it
in "intel_iommu: Enable stage-1 translation for emulated device" series.
Thanks
Zhenzhong
Zhenzhong Duan (3):
intel_iommu: Send IQE event when setting reserved bit in IQT_TAIL
intel_iommu: Add missed sanity check for 256-bit invalidation queue
intel_iommu: Add missed reserved bit check for IEC descriptor
hw/i386/intel_iommu_internal.h | 4 ++
hw/i386/intel_iommu.c | 89 +++++++++++++++++++++++++---------
2 files changed, 71 insertions(+), 22 deletions(-)
--
2.34.1
next reply other threads:[~2024-11-04 13:00 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-04 12:55 Zhenzhong Duan [this message]
2024-11-04 12:55 ` [PATCH 1/3] intel_iommu: Send IQE event when setting reserved bit in IQT_TAIL Zhenzhong Duan
2024-11-05 6:37 ` CLEMENT MATHIEU--DRIF
2024-11-05 6:52 ` Yi Liu
2024-11-04 12:55 ` [PATCH 2/3] intel_iommu: Add missed sanity check for 256-bit invalidation queue Zhenzhong Duan
2024-11-04 14:46 ` Michael S. Tsirkin
2024-11-05 2:40 ` Duan, Zhenzhong
2024-11-05 5:05 ` Yi Liu
2024-11-05 6:12 ` Duan, Zhenzhong
2024-11-05 6:50 ` Yi Liu
2024-11-05 7:43 ` Duan, Zhenzhong
2024-11-05 6:36 ` CLEMENT MATHIEU--DRIF
2024-11-05 7:38 ` Duan, Zhenzhong
2024-11-05 8:03 ` CLEMENT MATHIEU--DRIF
2024-11-04 12:55 ` [PATCH 3/3] intel_iommu: Add missed reserved bit check for IEC descriptor Zhenzhong Duan
2024-11-05 6:37 ` CLEMENT MATHIEU--DRIF
2024-11-05 6:56 ` Yi Liu
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