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From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Riku Voipio <riku.voipio@iki.fi>,
	Richard Henderson <richard.henderson@linaro.org>,
	Zhao Liu <zhao1.liu@intel.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
	Igor Mammedov <imammedo@redhat.com>,
	Ani Sinha <anisinha@redhat.com>
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"Cornelia Huck" <cohuck@redhat.com>,
	"Daniel P. Berrangé" <berrange@redhat.com>,
	"Eric Blake" <eblake@redhat.com>,
	"Markus Armbruster" <armbru@redhat.com>,
	"Marcelo Tosatti" <mtosatti@redhat.com>,
	rick.p.edgecombe@intel.com, kvm@vger.kernel.org,
	qemu-devel@nongnu.org, xiaoyao.li@intel.com
Subject: [PATCH v6 22/60] i386/tdx: Track RAM entries for TDX VM
Date: Tue,  5 Nov 2024 01:23:30 -0500	[thread overview]
Message-ID: <20241105062408.3533704-23-xiaoyao.li@intel.com> (raw)
In-Reply-To: <20241105062408.3533704-1-xiaoyao.li@intel.com>

The RAM of TDX VM can be classified into two types:

 - TDX_RAM_UNACCEPTED: default type of TDX memory, which needs to be
   accepted by TDX guest before it can be used and will be all-zeros
   after being accepted.

 - TDX_RAM_ADDED: the RAM that is ADD'ed to TD guest before running, and
   can be used directly. E.g., TD HOB and TEMP MEM that needed by TDVF.

Maintain TdxRamEntries[] which grabs the initial RAM info from e820 table
and mark each RAM range as default type TDX_RAM_UNACCEPTED.

Then turn the range of TD HOB and TEMP MEM to TDX_RAM_ADDED since these
ranges will be ADD'ed before TD runs and no need to be accepted runtime.

The TdxRamEntries[] are later used to setup the memory TD resource HOB
that passes memory info from QEMU to TDVF.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
---
Changes in v3:
- use enum TdxRamType in struct TdxRamEntry; (Isaku)
- Fix the indention; (Daniel)

Changes in v1:
  - simplify the algorithm of tdx_accept_ram_range() (Suggested-by: Gerd Hoffman)
    (1) Change the existing entry to cover the accepted ram range.
    (2) If there is room before the accepted ram range add a
	TDX_RAM_UNACCEPTED entry for that.
    (3) If there is room after the accepted ram range add a
	TDX_RAM_UNACCEPTED entry for that.
---
 target/i386/kvm/tdx.c | 111 ++++++++++++++++++++++++++++++++++++++++++
 target/i386/kvm/tdx.h |  14 ++++++
 2 files changed, 125 insertions(+)

diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c
index 6777f66a6451..76b40f278dd4 100644
--- a/target/i386/kvm/tdx.c
+++ b/target/i386/kvm/tdx.c
@@ -19,6 +19,7 @@
 #include "qom/object_interfaces.h"
 #include "sysemu/sysemu.h"
 
+#include "hw/i386/e820_memory_layout.h"
 #include "hw/i386/x86.h"
 #include "hw/i386/tdvf.h"
 #include "hw/i386/x86.h"
@@ -130,11 +131,117 @@ void tdx_set_tdvf_region(MemoryRegion *tdvf_mr)
     tdx_guest->tdvf_mr = tdvf_mr;
 }
 
+static void tdx_add_ram_entry(uint64_t address, uint64_t length,
+                              enum TdxRamType type)
+{
+    uint32_t nr_entries = tdx_guest->nr_ram_entries;
+    tdx_guest->ram_entries = g_renew(TdxRamEntry, tdx_guest->ram_entries,
+                                     nr_entries + 1);
+
+    tdx_guest->ram_entries[nr_entries].address = address;
+    tdx_guest->ram_entries[nr_entries].length = length;
+    tdx_guest->ram_entries[nr_entries].type = type;
+    tdx_guest->nr_ram_entries++;
+}
+
+static int tdx_accept_ram_range(uint64_t address, uint64_t length)
+{
+    uint64_t head_start, tail_start, head_length, tail_length;
+    uint64_t tmp_address, tmp_length;
+    TdxRamEntry *e;
+    int i;
+
+    for (i = 0; i < tdx_guest->nr_ram_entries; i++) {
+        e = &tdx_guest->ram_entries[i];
+
+        if (address + length <= e->address ||
+            e->address + e->length <= address) {
+            continue;
+        }
+
+        /*
+         * The to-be-accepted ram range must be fully contained by one
+         * RAM entry.
+         */
+        if (e->address > address ||
+            e->address + e->length < address + length) {
+            return -EINVAL;
+        }
+
+        if (e->type == TDX_RAM_ADDED) {
+            return -EINVAL;
+        }
+
+        break;
+    }
+
+    if (i == tdx_guest->nr_ram_entries) {
+        return -1;
+    }
+
+    tmp_address = e->address;
+    tmp_length = e->length;
+
+    e->address = address;
+    e->length = length;
+    e->type = TDX_RAM_ADDED;
+
+    head_length = address - tmp_address;
+    if (head_length > 0) {
+        head_start = tmp_address;
+        tdx_add_ram_entry(head_start, head_length, TDX_RAM_UNACCEPTED);
+    }
+
+    tail_start = address + length;
+    if (tail_start < tmp_address + tmp_length) {
+        tail_length = tmp_address + tmp_length - tail_start;
+        tdx_add_ram_entry(tail_start, tail_length, TDX_RAM_UNACCEPTED);
+    }
+
+    return 0;
+}
+
+static int tdx_ram_entry_compare(const void *lhs_, const void* rhs_)
+{
+    const TdxRamEntry *lhs = lhs_;
+    const TdxRamEntry *rhs = rhs_;
+
+    if (lhs->address == rhs->address) {
+        return 0;
+    }
+    if (le64_to_cpu(lhs->address) > le64_to_cpu(rhs->address)) {
+        return 1;
+    }
+    return -1;
+}
+
+static void tdx_init_ram_entries(void)
+{
+    unsigned i, j, nr_e820_entries;
+
+    nr_e820_entries = e820_get_table(NULL);
+    tdx_guest->ram_entries = g_new(TdxRamEntry, nr_e820_entries);
+
+    for (i = 0, j = 0; i < nr_e820_entries; i++) {
+        uint64_t addr, len;
+
+        if (e820_get_entry(i, E820_RAM, &addr, &len)) {
+            tdx_guest->ram_entries[j].address = addr;
+            tdx_guest->ram_entries[j].length = len;
+            tdx_guest->ram_entries[j].type = TDX_RAM_UNACCEPTED;
+            j++;
+        }
+    }
+    tdx_guest->nr_ram_entries = j;
+}
+
 static void tdx_finalize_vm(Notifier *notifier, void *unused)
 {
     TdxFirmware *tdvf = &tdx_guest->tdvf;
     TdxFirmwareEntry *entry;
 
+    tdx_init_ram_entries();
+
     for_each_tdx_fw_entry(tdvf, entry) {
         switch (entry->type) {
         case TDVF_SECTION_TYPE_BFV:
@@ -145,12 +252,16 @@ static void tdx_finalize_vm(Notifier *notifier, void *unused)
         case TDVF_SECTION_TYPE_TEMP_MEM:
             entry->mem_ptr = qemu_ram_mmap(-1, entry->size,
                                            qemu_real_host_page_size(), 0, 0);
+            tdx_accept_ram_range(entry->address, entry->size);
             break;
         default:
             error_report("Unsupported TDVF section %d", entry->type);
             exit(1);
         }
     }
+
+    qsort(tdx_guest->ram_entries, tdx_guest->nr_ram_entries,
+          sizeof(TdxRamEntry), &tdx_ram_entry_compare);
 }
 
 static Notifier tdx_machine_done_notify = {
diff --git a/target/i386/kvm/tdx.h b/target/i386/kvm/tdx.h
index 6b7926be3efe..c669e0d0daca 100644
--- a/target/i386/kvm/tdx.h
+++ b/target/i386/kvm/tdx.h
@@ -18,6 +18,17 @@ typedef struct TdxGuestClass {
 /* TDX requires bus frequency 25MHz */
 #define TDX_APIC_BUS_CYCLES_NS 40
 
+enum TdxRamType {
+    TDX_RAM_UNACCEPTED,
+    TDX_RAM_ADDED,
+};
+
+typedef struct TdxRamEntry {
+    uint64_t address;
+    uint64_t length;
+    enum TdxRamType type;
+} TdxRamEntry;
+
 typedef struct TdxGuest {
     X86ConfidentialGuest parent_obj;
 
@@ -32,6 +43,9 @@ typedef struct TdxGuest {
 
     MemoryRegion *tdvf_mr;
     TdxFirmware tdvf;
+
+    uint32_t nr_ram_entries;
+    TdxRamEntry *ram_entries;
 } TdxGuest;
 
 #ifdef CONFIG_TDX
-- 
2.34.1



  parent reply	other threads:[~2024-11-05  6:39 UTC|newest]

Thread overview: 125+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-05  6:23 [PATCH v6 00/60] QEMU TDX support Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 01/60] *** HACK *** linux-headers: Update headers to pull in TDX API changes Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 02/60] i386: Introduce tdx-guest object Xiaoyao Li
2024-11-05 10:18   ` Daniel P. Berrangé
2024-11-05 11:42     ` Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 03/60] i386/tdx: Implement tdx_kvm_type() for TDX Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 04/60] i386/tdx: Implement tdx_kvm_init() to initialize TDX VM context Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 05/60] i386/tdx: Get tdx_capabilities via KVM_TDX_CAPABILITIES Xiaoyao Li
2024-11-05 10:30   ` Daniel P. Berrangé
2024-11-05  6:23 ` [PATCH v6 06/60] i386/tdx: Introduce is_tdx_vm() helper and cache tdx_guest object Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 07/60] kvm: Introduce kvm_arch_pre_create_vcpu() Xiaoyao Li
2024-11-13  6:28   ` Philippe Mathieu-Daudé
2024-11-25  7:27     ` Xiaoyao Li
2024-11-26  9:46       ` Philippe Mathieu-Daudé
2024-11-05  6:23 ` [PATCH v6 08/60] i386/kvm: Export cpuid_entry_get_reg() and cpuid_find_entry() Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 09/60] i386/tdx: Initialize TDX before creating TD vcpus Xiaoyao Li
2024-11-05 10:34   ` Daniel P. Berrangé
2024-11-05 11:51     ` Xiaoyao Li
2024-11-05 11:53       ` Daniel P. Berrangé
2024-11-05 20:51   ` Edgecombe, Rick P
2024-11-06  2:01     ` Xiaoyao Li
2024-11-06  5:13       ` Tony Lindgren
2024-12-12 17:24         ` Ira Weiny
2024-12-17 13:10           ` Tony Lindgren
2025-01-14 12:39             ` Xiaoyao Li
2025-01-15 12:12               ` Tony Lindgren
2024-11-05  6:23 ` [PATCH v6 10/60] i386/tdx: Add property sept-ve-disable for tdx-guest object Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 11/60] i386/tdx: Make sept_ve_disable set by default Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 12/60] i386/tdx: Wire CPU features up with attributes of TD guest Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 13/60] i386/tdx: Validate TD attributes Xiaoyao Li
2024-11-05 10:36   ` Daniel P. Berrangé
2024-11-05 11:53     ` Xiaoyao Li
2024-11-05 11:54       ` Daniel P. Berrangé
2024-11-05 20:56   ` Edgecombe, Rick P
2024-11-06  1:38     ` Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 14/60] i386/tdx: Support user configurable mrconfigid/mrowner/mrownerconfig Xiaoyao Li
2024-11-05 10:38   ` Daniel P. Berrangé
2024-11-05 11:54     ` Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 15/60] i386/tdx: Set APIC bus rate to match with what TDX module enforces Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 16/60] i386/tdx: Implement user specified tsc frequency Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 17/60] i386/tdx: load TDVF for TD guest Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 18/60] i386/tdvf: Introduce function to parse TDVF metadata Xiaoyao Li
2024-11-05 10:42   ` Daniel P. Berrangé
2024-11-05  6:23 ` [PATCH v6 19/60] i386/tdx: Parse TDVF metadata for TDX VM Xiaoyao Li
2024-12-12 17:55   ` Ira Weiny
2024-11-05  6:23 ` [PATCH v6 20/60] i386/tdx: Don't initialize pc.rom for TDX VMs Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 21/60] i386/tdx: Track mem_ptr for each firmware entry of TDVF Xiaoyao Li
2024-11-05  6:23 ` Xiaoyao Li [this message]
2024-11-05  6:23 ` [PATCH v6 23/60] headers: Add definitions from UEFI spec for volumes, resources, etc Xiaoyao Li
2024-11-05 10:45   ` Daniel P. Berrangé
2024-11-05  6:23 ` [PATCH v6 24/60] i386/tdx: Setup the TD HOB list Xiaoyao Li
2024-11-05 10:46   ` Daniel P. Berrangé
2024-11-05  6:23 ` [PATCH v6 25/60] i386/tdx: Add TDVF memory via KVM_TDX_INIT_MEM_REGION Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 26/60] i386/tdx: Call KVM_TDX_INIT_VCPU to initialize TDX vcpu Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 27/60] i386/tdx: Finalize TDX VM Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 28/60] i386/tdx: Enable user exit on KVM_HC_MAP_GPA_RANGE Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 29/60] i386/tdx: Handle KVM_SYSTEM_EVENT_TDX_FATAL Xiaoyao Li
2024-11-05 20:55   ` Edgecombe, Rick P
2024-11-06 14:28     ` Edgecombe, Rick P
2024-11-05  6:23 ` [PATCH v6 30/60] i386/tdx: Wire TDX_REPORT_FATAL_ERROR with GuestPanic facility Xiaoyao Li
2024-11-05 10:53   ` Daniel P. Berrangé
2024-11-05  6:23 ` [PATCH v6 31/60] i386/cpu: introduce x86_confidential_guest_cpu_instance_init() Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 32/60] i386/tdx: implement tdx_cpu_instance_init() Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 33/60] i386/cpu: introduce x86_confidenetial_guest_cpu_realizefn() Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 34/60] i386/tdx: implement tdx_cpu_realizefn() Xiaoyao Li
2024-11-05 10:06   ` Paolo Bonzini
2024-11-05 11:38     ` Xiaoyao Li
2024-11-05 11:53       ` Paolo Bonzini
2024-12-12 22:04         ` Ira Weiny
2025-01-14  8:52           ` Xiaoyao Li
2025-01-14 13:10             ` Daniel P. Berrangé
2024-11-05  6:23 ` [PATCH v6 35/60] i386/cpu: Introduce enable_cpuid_0x1f to force exposing CPUID 0x1f Xiaoyao Li
2024-12-12 22:16   ` Ira Weiny
2025-01-14 12:51     ` Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 36/60] i386/tdx: Force " Xiaoyao Li
2024-12-12 22:17   ` Ira Weiny
2025-01-14 12:55     ` Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 37/60] i386/tdx: Set kvm_readonly_mem_enabled to false for TDX VM Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 38/60] i386/tdx: Disable SMM for TDX VMs Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 39/60] i386/tdx: Disable PIC " Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 40/60] hw/i386: add eoi_intercept_unsupported member to X86MachineState Xiaoyao Li
2025-01-23 12:41   ` Igor Mammedov
2025-01-23 16:45     ` Xiaoyao Li
2025-01-24 13:00       ` Igor Mammedov
2024-11-05  6:23 ` [PATCH v6 41/60] hw/i386: add option to forcibly report edge trigger in acpi tables Xiaoyao Li
2024-12-12 22:39   ` Ira Weiny
2025-01-14 13:01     ` Xiaoyao Li
2025-01-23 12:53       ` Igor Mammedov
2025-01-24 13:53         ` Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 42/60] i386/tdx: Don't synchronize guest tsc for TDs Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 43/60] i386/tdx: Only configure MSR_IA32_UCODE_REV in kvm_init_msrs() " Xiaoyao Li
2024-12-13 14:42   ` Ira Weiny
2024-12-17  9:41     ` Paolo Bonzini
2024-11-05  6:23 ` [PATCH v6 44/60] i386/tdx: Skip kvm_put_apicbase() " Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 45/60] i386/tdx: Don't get/put guest state for TDX VMs Xiaoyao Li
2024-11-05  9:55   ` Paolo Bonzini
2024-11-05 11:25     ` Xiaoyao Li
2024-11-05 14:23       ` Paolo Bonzini
2024-11-06 13:57         ` Xiaoyao Li
2024-11-06 19:56           ` Paolo Bonzini
2024-11-05  6:23 ` [PATCH v6 46/60] i386/cgs: Rename *mask_cpuid_features() to *adjust_cpuid_features() Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 47/60] i386/tdx: Implement adjust_cpuid_features() for TDX Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 48/60] i386/tdx: Apply TDX fixed0 and fixed1 information to supported CPUIDs Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 49/60] i386/tdx: Mask off CPUID bits by unsupported TD Attributes Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 50/60] i386/cpu: Move CPUID_XSTATE_XSS_MASK to header file and introduce CPUID_XSTATE_MASK Xiaoyao Li
2024-11-05  6:23 ` [PATCH v6 51/60] i386/tdx: Mask off CPUID bits by unsupported XFAM Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 52/60] i386/cpu: Expose mark_unavailable_features() for TDX Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 53/60] i386/cpu: introduce mark_forced_on_features() Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 54/60] i386/cgs: Introduce x86_confidential_guest_check_features() Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 55/60] i386/tdx: Fetch and validate CPUID of TD guest Xiaoyao Li
2024-12-12 17:52   ` Ira Weiny
2025-01-14 13:03     ` Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 56/60] i386/tdx: Don't treat SYSCALL as unavailable Xiaoyao Li
2024-11-05  9:59   ` Paolo Bonzini
2025-01-16  8:53     ` Xiaoyao Li
2024-11-05 11:07   ` Daniel P. Berrangé
2024-11-05  6:24 ` [PATCH v6 57/60] i386/tdx: Make invtsc default on Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 58/60] cpu: Introduce qemu_early_init_vcpu() Xiaoyao Li
2024-11-05  6:24 ` [PATCH v6 59/60] i386/cpu: Set up CPUID_HT in x86_cpu_realizefn() instead of cpu_x86_cpuid() Xiaoyao Li
2024-11-05  9:12   ` Paolo Bonzini
2024-11-05  9:33     ` Xiaoyao Li
2024-11-05  9:53       ` Paolo Bonzini
2024-11-05  6:24 ` [PATCH v6 60/60] docs: Add TDX documentation Xiaoyao Li
2024-11-05 11:14   ` Daniel P. Berrangé
2024-11-12 10:17   ` Francesco Lavra

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