[PULL v2 00/29] Misc HW patches for 2024-11-05

[PULL v2 00/29] Misc HW patches for 2024-11-05

[Philippe Mathieu-Daudé]

The following changes since commit 44a9394b1d272b53306d097d4bc20ff7ad14b159:

  Merge tag 'pull-nvme-20241104' of https://gitlab.com/birkelund/qemu into staging (2024-11-05 14:23:22 +0000)

are available in the Git repository at:

  https://github.com/philmd/qemu.git tags/hw-misc-20241105

for you to fetch changes up to d37eede7a8e6ff33d21aacb41a68e63e8ffa1d60:

  hw/riscv/iommu: fix build error with clang (2024-11-05 23:32:25 +0000)

----------------------------------------------------------------
Misc HW patch queue

- Deprecate a pair of untested microblaze big-endian machines (Philippe)
- Arch-agnostic CPU topology checks at machine level (Zhao)
- Cleanups on PPC E500 (Bernhard)
- Various conversions to DEFINE_TYPES() macro (Bernhard)
- Fix RISC-V _pext_u64() name clashing (Pierrick)

----------------------------------------------------------------

Bernhard Beschow (17):
  hw/ppc/e500: Prefer QOM cast
  hw/ppc/e500: Remove unused "irqs" parameter
  hw/ppc/e500: Add missing device tree properties to i2c controller node
  hw/ppc/mpc8544_guts: Populate POR PLL ratio status register
  hw/i2c/mpc_i2c: Convert DPRINTF to trace events for register access
  hw/i2c/mpc_i2c: Prefer DEFINE_TYPES() macro
  hw/pci-host/ppce500: Reuse TYPE_PPC_E500_PCI_BRIDGE define
  hw/pci-host/ppce500: Prefer DEFINE_TYPES() macro
  hw/net/fsl_etsec/miim: Reuse MII constants
  hw/net/fsl_etsec/etsec: Prefer DEFINE_TYPES() macro
  hw/gpio/mpc8xxx: Prefer DEFINE_TYPES() macro
  hw/ppc/mpc8544_guts: Prefer DEFINE_TYPES() macro
  hw/sd/sdhci: Prefer DEFINE_TYPES() macro
  hw/block/pflash_cfi01: Prefer DEFINE_TYPES() macro
  hw/i2c/smbus_eeprom: Prefer DEFINE_TYPES() macro
  hw/rtc/ds1338: Prefer DEFINE_TYPES() macro
  hw/usb/hcd-ehci-sysbus: Prefer DEFINE_TYPES() macro

Philippe Mathieu-Daudé (6):
  target/microblaze: Alias CPU endianness property as 'little-endian'
  hw/microblaze: Deprecate big-endian petalogix-ml605 & xlnx-zynqmp-pmu
  hw/microblaze/s3adsp1800: Explicit CPU endianness
  hw/microblaze/s3adsp1800: Rename unimplemented MMIO region as xps_gpio
  hw/microblaze/s3adsp1800: Declare machine type using DEFINE_TYPES
    macro
  hw/core/machine: Add missing 'units.h' and 'error-report.h' headers

Pierrick Bouvier (1):
  hw/riscv/iommu: fix build error with clang

Zhao Liu (5):
  i386/cpu: Don't enumerate the "invalid" CPU topology level
  hw/core: Make CPU topology enumeration arch-agnostic
  qapi/qom: Define cache enumeration and properties for machine
  hw/core: Check smp cache topology support for machine
  hw/core: Add a helper to check the cache topology level

 docs/about/deprecated.rst                     |   6 +
 .../devices/microblaze-softmmu/default.mak    |   2 -
 .../devices/microblazeel-softmmu/default.mak  |   5 +-
 qapi/machine-common.json                      |  94 ++++++++++-
 include/hw/boards.h                           |  16 ++
 include/hw/i386/topology.h                    |  22 +--
 target/i386/cpu.h                             |   4 +-
 hw/block/pflash_cfi01.c                       |  21 +--
 hw/core/machine-smp.c                         | 126 +++++++++++++++
 hw/core/machine.c                             |  46 ++++++
 hw/gpio/mpc8xxx.c                             |  22 ++-
 hw/i2c/mpc_i2c.c                              |  29 ++--
 hw/i2c/smbus_eeprom.c                         |  19 +--
 hw/i386/x86-common.c                          |   4 +-
 hw/microblaze/petalogix_ml605_mmu.c           |   9 +-
 hw/microblaze/petalogix_s3adsp1800_mmu.c      |  21 ++-
 hw/microblaze/xlnx-zynqmp-pmu.c               |  10 +-
 hw/net/fsl_etsec/etsec.c                      |  22 ++-
 hw/net/fsl_etsec/miim.c                       |  19 +--
 hw/pci-host/ppce500.c                         |  44 +++--
 hw/ppc/e500.c                                 |  10 +-
 hw/ppc/mpc8544_guts.c                         |  32 ++--
 hw/riscv/riscv-iommu.c                        |  23 ++-
 hw/rtc/ds1338.c                               |  20 +--
 hw/sd/sdhci.c                                 |  62 +++----
 hw/usb/hcd-ehci-sysbus.c                      | 118 ++++++--------
 target/i386/cpu.c                             | 151 +++++++++---------
 target/microblaze/cpu.c                       |  10 ++
 hw/i2c/trace-events                           |   5 +
 29 files changed, 625 insertions(+), 347 deletions(-)

-- 
2.45.2

[PULL v2 01/29] target/microblaze: Alias CPU endianness property as 'little-endian'

[Philippe Mathieu-Daudé]

Alias the 'endian' property as 'little-endian' because the 'ENDI'
bit is set when the endianness is in little order, and unset in
big order.

Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20241105130431.22564-2-philmd@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Message-Id: <3f61b85c-9382-4520-a1ce-5476eb16fb56@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/microblaze/petalogix_ml605_mmu.c |  2 +-
 hw/microblaze/xlnx-zynqmp-pmu.c     |  2 +-
 target/microblaze/cpu.c             | 10 ++++++++++
 3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index b4183c5267d..df808ac323e 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -90,7 +90,7 @@ petalogix_ml605_init(MachineState *machine)
     object_property_set_int(OBJECT(cpu), "use-fpu", 1, &error_abort);
     object_property_set_bool(OBJECT(cpu), "dcache-writeback", true,
                              &error_abort);
-    object_property_set_bool(OBJECT(cpu), "endianness", true, &error_abort);
+    object_property_set_bool(OBJECT(cpu), "little-endian", true, &error_abort);
     qdev_realize(DEVICE(cpu), NULL, &error_abort);
 
     /* Attach emulated BRAM through the LMB.  */
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index 1bfc9641d29..43608c2dca4 100644
--- a/hw/microblaze/xlnx-zynqmp-pmu.c
+++ b/hw/microblaze/xlnx-zynqmp-pmu.c
@@ -90,7 +90,7 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
     object_property_set_bool(OBJECT(&s->cpu), "use-pcmp-instr", true,
                              &error_abort);
     object_property_set_bool(OBJECT(&s->cpu), "use-mmu", false, &error_abort);
-    object_property_set_bool(OBJECT(&s->cpu), "endianness", true,
+    object_property_set_bool(OBJECT(&s->cpu), "little-endian", true,
                              &error_abort);
     object_property_set_str(OBJECT(&s->cpu), "version", "8.40.b",
                             &error_abort);
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 135947ee800..b322f060777 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -328,9 +328,16 @@ static void mb_cpu_initfn(Object *obj)
     qdev_init_gpio_in_named(DEVICE(cpu), mb_cpu_ns_axi_dc, "ns_axi_dc", 1);
     qdev_init_gpio_in_named(DEVICE(cpu), mb_cpu_ns_axi_ic, "ns_axi_ic", 1);
 #endif
+
+    /* Restricted 'endianness' property is equivalent of 'little-endian' */
+    object_property_add_alias(obj, "little-endian", obj, "endianness");
 }
 
 static Property mb_properties[] = {
+    /*
+     * Following properties are used by Xilinx DTS conversion tool
+     * do not rename them.
+     */
     DEFINE_PROP_UINT32("base-vectors", MicroBlazeCPU, cfg.base_vectors, 0),
     DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
                      false),
@@ -387,6 +394,9 @@ static Property mb_properties[] = {
     DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
     DEFINE_PROP_UINT8("pvr-user1", MicroBlazeCPU, cfg.pvr_user1, 0),
     DEFINE_PROP_UINT32("pvr-user2", MicroBlazeCPU, cfg.pvr_user2, 0),
+    /*
+     * End of properties reserved by Xilinx DTS conversion tool.
+     */
     DEFINE_PROP_END_OF_LIST(),
 };
 
-- 
2.45.2

Re: [PULL v2 00/29] Misc HW patches for 2024-11-05

[Peter Maydell]

On Tue, 5 Nov 2024 at 23:35, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>
> The following changes since commit 44a9394b1d272b53306d097d4bc20ff7ad14b159:
>
>   Merge tag 'pull-nvme-20241104' of https://gitlab.com/birkelund/qemu into staging (2024-11-05 14:23:22 +0000)
>
> are available in the Git repository at:
>
>   https://github.com/philmd/qemu.git tags/hw-misc-20241105
>
> for you to fetch changes up to d37eede7a8e6ff33d21aacb41a68e63e8ffa1d60:
>
>   hw/riscv/iommu: fix build error with clang (2024-11-05 23:32:25 +0000)
>
> ----------------------------------------------------------------
> Misc HW patch queue
>
> - Deprecate a pair of untested microblaze big-endian machines (Philippe)
> - Arch-agnostic CPU topology checks at machine level (Zhao)
> - Cleanups on PPC E500 (Bernhard)
> - Various conversions to DEFINE_TYPES() macro (Bernhard)
> - Fix RISC-V _pext_u64() name clashing (Pierrick)
>
> ----------------------------------------------------------------


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/9.2
for any user-visible changes.

-- PMM