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From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: "Michael S. Tsirkin" <mst@redhat.com>, <linuxarm@huawei.com>
Cc: <imammedo@redhat.com>, Markus Armbruster <armbru@redhat.com>,
	<qemu-devel@nongnu.org>, <ankita@nvidia.com>,
	<linux-cxl@vger.kernel.org>, <marcel.apfelbaum@gmail.com>,
	<philmd@linaro.org>,
	Richard Henderson <richard.henderson@linaro.org>,
	Dave Jiang <dave.jiang@intel.com>,
	"Huang Ying" <ying.huang@intel.com>,
	Paolo Bonzini <pbonzini@redhat.com>, <eduardo@habkost.net>,
	Michael Roth <michael.roth@amd.com>,
	Ani Sinha <anisinha@redhat.com>
Subject: Re: [PATCH v6 14/15] bios-tables-test: Add complex SRAT / HMAT test for GI GP
Date: Thu, 7 Nov 2024 11:48:16 +0000	[thread overview]
Message-ID: <20241107114816.00004195@Huawei.com> (raw)
In-Reply-To: <20241106122707.00007552@Huawei.com>

On Wed, 6 Nov 2024 12:27:07 +0000
Jonathan Cameron <Jonathan.Cameron@Huawei.com> wrote:

> On Mon, 4 Nov 2024 11:00:59 -0500
> "Michael S. Tsirkin" <mst@redhat.com> wrote:
> 
> > On Mon, Sep 16, 2024 at 06:44:49PM +0100, Jonathan Cameron wrote:  
> > > Add a test with 6 nodes to exercise most interesting corner cases of SRAT
> > > and HMAT generation including the new Generic Initiator and Generic Port
> > > Affinity structures.  More details of the set up in the following patch
> > > adding the table data.
> > > 
> > > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>    
> >   
> Was traveling for last few days, sorry for delay!
> > 
> > I could not yet figure out why, but it fails on i686 (32 bit):
> > 
> > https://gitlab.com/mstredhat/qemu/-/jobs/8262608614
> > 
> > any idea?  
> 
> Nothing immediately comes to mind. 
> I'll see what I can figure out from the generated binaries. 

My dumb bug from a messed up refactor :(  Anyhow I'm just rerunning the
test and if all fixed I'll send a series with the docs fix this and
the tests.  Pick up whatever combination makes sense now we are in
the soft freeze.

make docker-test-quick@debian-i686-cross
is not quick :)

Jonathan

> 
> Jonathan
> 
> >   
> > > ---
> > >  tests/qtest/bios-tables-test.c | 97 ++++++++++++++++++++++++++++++++++
> > >  1 file changed, 97 insertions(+)
> > > 
> > > diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> > > index 36e5c0adde..f568c4a21c 100644
> > > --- a/tests/qtest/bios-tables-test.c
> > > +++ b/tests/qtest/bios-tables-test.c
> > > @@ -1910,6 +1910,101 @@ static void test_acpi_q35_tcg_acpi_hmat_noinitiator(void)
> > >      free_test_data(&data);
> > >  }
> > >  
> > > +/* Test intended to hit corner cases of SRAT and HMAT */
> > > +static void test_acpi_q35_tcg_acpi_hmat_generic_x(void)
> > > +{
> > > +    test_data data = {};
> > > +
> > > +    data.machine = MACHINE_Q35;
> > > +    data.arch    = "x86";
> > > +    data.variant = ".acpihmat-generic-x";
> > > +    test_acpi_one(" -machine hmat=on,cxl=on"
> > > +                  " -smp 3,sockets=3"
> > > +                  " -m 128M,maxmem=384M,slots=2"
> > > +                  " -device pcie-root-port,chassis=1,id=pci.1"
> > > +                  " -device pci-testdev,bus=pci.1,"
> > > +                  "multifunction=on,addr=00.0"
> > > +                  " -device pci-testdev,bus=pci.1,addr=00.1"
> > > +                  " -device pci-testdev,bus=pci.1,id=gidev,addr=00.2"
> > > +                  " -device pxb-cxl,bus_nr=64,bus=pcie.0,id=cxl.1"
> > > +                  " -object memory-backend-ram,size=64M,id=ram0"
> > > +                  " -object memory-backend-ram,size=64M,id=ram1"
> > > +                  " -numa node,nodeid=0,cpus=0,memdev=ram0"
> > > +                  " -numa node,nodeid=1"
> > > +                  " -object acpi-generic-initiator,id=gi0,pci-dev=gidev,node=1"
> > > +                  " -numa node,nodeid=2"
> > > +                  " -object acpi-generic-port,id=gp0,pci-bus=cxl.1,node=2"
> > > +                  " -numa node,nodeid=3,cpus=1"
> > > +                  " -numa node,nodeid=4,memdev=ram1"
> > > +                  " -numa node,nodeid=5,cpus=2"
> > > +                  " -numa hmat-lb,initiator=0,target=0,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=10"
> > > +                  " -numa hmat-lb,initiator=0,target=0,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=800M"
> > > +                  " -numa hmat-lb,initiator=0,target=2,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=100"
> > > +                  " -numa hmat-lb,initiator=0,target=2,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=200M"
> > > +                  " -numa hmat-lb,initiator=0,target=4,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=100"
> > > +                  " -numa hmat-lb,initiator=0,target=4,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=200M"
> > > +                  " -numa hmat-lb,initiator=0,target=5,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=200"
> > > +                  " -numa hmat-lb,initiator=0,target=5,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=400M"
> > > +                  " -numa hmat-lb,initiator=1,target=0,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=500"
> > > +                  " -numa hmat-lb,initiator=1,target=0,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=100M"
> > > +                  " -numa hmat-lb,initiator=1,target=2,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=50"
> > > +                  " -numa hmat-lb,initiator=1,target=2,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=400M"
> > > +                  " -numa hmat-lb,initiator=1,target=4,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=50"
> > > +                  " -numa hmat-lb,initiator=1,target=4,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=800M"
> > > +                  " -numa hmat-lb,initiator=1,target=5,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=500"
> > > +                  " -numa hmat-lb,initiator=1,target=5,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=100M"
> > > +                  " -numa hmat-lb,initiator=3,target=0,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=20"
> > > +                  " -numa hmat-lb,initiator=3,target=0,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=400M"
> > > +                  " -numa hmat-lb,initiator=3,target=2,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=80"
> > > +                  " -numa hmat-lb,initiator=3,target=2,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=200M"
> > > +                  " -numa hmat-lb,initiator=3,target=4,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=80"
> > > +                  " -numa hmat-lb,initiator=3,target=4,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=200M"
> > > +                  " -numa hmat-lb,initiator=3,target=5,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=20"
> > > +                  " -numa hmat-lb,initiator=3,target=5,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=400M"
> > > +                  " -numa hmat-lb,initiator=5,target=0,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=20"
> > > +                  " -numa hmat-lb,initiator=5,target=0,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=400M"
> > > +                  " -numa hmat-lb,initiator=5,target=2,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=80"
> > > +                  " -numa hmat-lb,initiator=5,target=4,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=200M"
> > > +                  " -numa hmat-lb,initiator=5,target=4,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=80"
> > > +                  " -numa hmat-lb,initiator=5,target=2,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=200M"
> > > +                  " -numa hmat-lb,initiator=5,target=5,hierarchy=memory,"
> > > +                  "data-type=access-latency,latency=10"
> > > +                  " -numa hmat-lb,initiator=5,target=5,hierarchy=memory,"
> > > +                  "data-type=access-bandwidth,bandwidth=800M",
> > > +                  &data);
> > > +    free_test_data(&data);
> > > +}
> > > +
> > >  #ifdef CONFIG_POSIX
> > >  static void test_acpi_erst(const char *machine, const char *arch)
> > >  {
> > > @@ -2388,6 +2483,8 @@ int main(int argc, char *argv[])
> > >              qtest_add_func("acpi/q35/nohpet", test_acpi_q35_tcg_nohpet);
> > >              qtest_add_func("acpi/q35/acpihmat-noinitiator",
> > >                             test_acpi_q35_tcg_acpi_hmat_noinitiator);
> > > +            qtest_add_func("acpi/q35/acpihmat-genericx",
> > > +                           test_acpi_q35_tcg_acpi_hmat_generic_x);
> > >  
> > >              /* i386 does not support memory hotplug */
> > >              if (strcmp(arch, "i386")) {
> > > -- 
> > > 2.43.0    
> > 
> >   
> 
> 



  reply	other threads:[~2024-11-07 11:49 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-16 17:10 [PATCH v6 00/15] acpi: NUMA nodes for CXL HB as GP + complex NUMA test Jonathan Cameron via
2024-09-16 17:10 ` [PATCH v6 01/15] hw/acpi: Fix ordering of BDF in Generic Initiator PCI Device Handle Jonathan Cameron via
2024-11-06 12:17   ` Michael Tokarev
2024-09-16 17:10 ` [PATCH v6 02/15] hw/acpi/GI: Fix trivial parameter alignment issue Jonathan Cameron via
2024-09-16 17:10 ` [PATCH v6 03/15] hw/acpi: Move AML building code for Generic Initiators to aml_build.c Jonathan Cameron via
2024-09-16 17:10 ` [PATCH v6 04/15] hw/acpi: Rename build_all_acpi_generic_initiators() to build_acpi_generic_initiator() Jonathan Cameron via
2024-09-16 17:10 ` [PATCH v6 05/15] hw/pci: Add a busnr property to pci_props and use for acpi/gi Jonathan Cameron via
2024-09-16 17:10 ` [PATCH v6 06/15] acpi/pci: Move Generic Initiator object handling into acpi/pci.* Jonathan Cameron via
2024-09-16 17:10 ` [PATCH v6 07/15] hw/pci-bridge: Add acpi_uid property to TYPE_PXB_BUS Jonathan Cameron via
2024-09-16 17:10 ` [PATCH v6 08/15] hw/i386/acpi: Use TYPE_PXB_BUS property acpi_uid for DSDT Jonathan Cameron via
2024-09-16 17:10 ` [PATCH v6 09/15] hw/pci-host/gpex-acpi: Use acpi_uid property Jonathan Cameron via
2024-09-16 17:41 ` [PATCH v6 10/15] hw/acpi: Generic Port Affinity Structure support Jonathan Cameron via
2024-11-06 18:13   ` Jonathan Cameron via
2024-09-16 17:42 ` [PATCH v6 11/15] hw/acpi: Make storage of node id uint32_t to reduce fragility Jonathan Cameron via
2024-09-16 17:43 ` [PATCH v6 12/15] hw/acpi: Generic Initiator - add missing object class property descriptions Jonathan Cameron via
2024-09-16 17:44 ` [PATCH v6 13/15] bios-tables-test: Allow for new acpihmat-generic-x test data Jonathan Cameron via
2024-09-16 17:44 ` [PATCH v6 14/15] bios-tables-test: Add complex SRAT / HMAT test for GI GP Jonathan Cameron via
2024-11-04 16:00   ` Michael S. Tsirkin
2024-11-06 12:27     ` Jonathan Cameron via
2024-11-07 11:48       ` Jonathan Cameron via [this message]
2024-09-16 17:45 ` [PATCH v6 15/15] bios-tables-test: Add data for complex numa test (GI, GP etc) Jonathan Cameron via
2024-10-29 10:25 ` [PATCH v6 00/15] acpi: NUMA nodes for CXL HB as GP + complex NUMA test Jonathan Cameron via

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