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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Anton Johansson <anjo@rev.ng>,
	qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, "Thomas Huth" <thuth@redhat.com>,
	qemu-arm@nongnu.org, "Peter Xu" <peterx@redhat.com>,
	"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	qemu-riscv@nongnu.org, "David Hildenbrand" <david@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	qemu-s390x@nongnu.org,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH 16/24] exec: Declare tlb_set_page_with_attrs() in 'exec/cputlb.h'
Date: Thu, 14 Nov 2024 02:13:01 +0100	[thread overview]
Message-ID: <20241114011310.3615-17-philmd@linaro.org> (raw)
In-Reply-To: <20241114011310.3615-1-philmd@linaro.org>

Move CPU TLB related methods to "exec/cputlb.h".

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/exec/cputlb.h                | 28 ++++++++++++++++++++++++++++
 include/exec/exec-all.h              | 25 -------------------------
 target/i386/tcg/sysemu/excp_helper.c |  2 +-
 target/microblaze/helper.c           |  2 +-
 4 files changed, 30 insertions(+), 27 deletions(-)

diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h
index f6205d5306..ae4798a017 100644
--- a/include/exec/cputlb.h
+++ b/include/exec/cputlb.h
@@ -21,6 +21,8 @@
 #define CPUTLB_H
 
 #include "exec/cpu-common.h"
+#include "exec/hwaddr.h"
+#include "exec/memattrs.h"
 #include "exec/vaddr.h"
 
 #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
@@ -80,4 +82,30 @@ void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length);
 void tlb_set_page_full(CPUState *cpu, int mmu_idx, vaddr addr,
                        CPUTLBEntryFull *full);
 
+/**
+ * tlb_set_page_with_attrs:
+ * @cpu: CPU to add this TLB entry for
+ * @addr: virtual address of page to add entry for
+ * @paddr: physical address of the page
+ * @attrs: memory transaction attributes
+ * @prot: access permissions (PAGE_READ/PAGE_WRITE/PAGE_EXEC bits)
+ * @mmu_idx: MMU index to insert TLB entry for
+ * @size: size of the page in bytes
+ *
+ * Add an entry to this CPU's TLB (a mapping from virtual address
+ * @addr to physical address @paddr) with the specified memory
+ * transaction attributes. This is generally called by the target CPU
+ * specific code after it has been called through the tlb_fill()
+ * entry point and performed a successful page table walk to find
+ * the physical address and attributes for the virtual address
+ * which provoked the TLB miss.
+ *
+ * At most one entry for a given virtual address is permitted. Only a
+ * single TARGET_PAGE_SIZE region is mapped; the supplied @size is only
+ * used by tlb_flush_page.
+ */
+void tlb_set_page_with_attrs(CPUState *cpu, vaddr addr,
+                             hwaddr paddr, MemTxAttrs attrs,
+                             int prot, int mmu_idx, vaddr size);
+
 #endif
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 79649537b0..2b314d658b 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -174,31 +174,6 @@ void tlb_flush_range_by_mmuidx_all_cpus_synced(CPUState *cpu,
                                                uint16_t idxmap,
                                                unsigned bits);
 
-/**
- * tlb_set_page_with_attrs:
- * @cpu: CPU to add this TLB entry for
- * @addr: virtual address of page to add entry for
- * @paddr: physical address of the page
- * @attrs: memory transaction attributes
- * @prot: access permissions (PAGE_READ/PAGE_WRITE/PAGE_EXEC bits)
- * @mmu_idx: MMU index to insert TLB entry for
- * @size: size of the page in bytes
- *
- * Add an entry to this CPU's TLB (a mapping from virtual address
- * @addr to physical address @paddr) with the specified memory
- * transaction attributes. This is generally called by the target CPU
- * specific code after it has been called through the tlb_fill()
- * entry point and performed a successful page table walk to find
- * the physical address and attributes for the virtual address
- * which provoked the TLB miss.
- *
- * At most one entry for a given virtual address is permitted. Only a
- * single TARGET_PAGE_SIZE region is mapped; the supplied @size is only
- * used by tlb_flush_page.
- */
-void tlb_set_page_with_attrs(CPUState *cpu, vaddr addr,
-                             hwaddr paddr, MemTxAttrs attrs,
-                             int prot, int mmu_idx, vaddr size);
 /* tlb_set_page:
  *
  * This function is equivalent to calling tlb_set_page_with_attrs()
diff --git a/target/i386/tcg/sysemu/excp_helper.c b/target/i386/tcg/sysemu/excp_helper.c
index da187c8792..cda0152b80 100644
--- a/target/i386/tcg/sysemu/excp_helper.c
+++ b/target/i386/tcg/sysemu/excp_helper.c
@@ -20,7 +20,7 @@
 #include "qemu/osdep.h"
 #include "cpu.h"
 #include "exec/cpu_ldst.h"
-#include "exec/exec-all.h"
+#include "exec/cputlb.h"
 #include "exec/page-protection.h"
 #include "tcg/helper-tcg.h"
 
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index 5d3259ce31..27fc929bee 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -20,7 +20,7 @@
 
 #include "qemu/osdep.h"
 #include "cpu.h"
-#include "exec/exec-all.h"
+#include "exec/cputlb.h"
 #include "exec/page-protection.h"
 #include "qemu/host-utils.h"
 #include "exec/log.h"
-- 
2.45.2



  parent reply	other threads:[~2024-11-14  1:18 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-14  1:12 [PATCH 00/24] exec: Build up 'cputlb.h' and 'ram_addr.h' headers Philippe Mathieu-Daudé
2024-11-14  1:12 ` [PATCH 01/24] exec/cpu-all: Include missing 'exec/cpu-defs.h' header Philippe Mathieu-Daudé
2024-11-14  4:09   ` Pierrick Bouvier
2024-11-14  8:29   ` Thomas Huth
2024-11-14 18:11     ` Richard Henderson
2024-11-14  1:12 ` [PATCH 02/24] exec/cpu-defs: Remove unnecessary headers Philippe Mathieu-Daudé
2024-11-14  4:09   ` Pierrick Bouvier
2024-11-14  8:33   ` Thomas Huth
2024-11-14 18:15   ` Richard Henderson
2024-11-14  1:12 ` [PATCH 03/24] exec/translation-block: Include missing 'exec/vaddr.h' header Philippe Mathieu-Daudé
2024-11-14  4:10   ` Pierrick Bouvier
2024-11-14 15:23     ` Philippe Mathieu-Daudé
2024-11-14 17:13       ` Pierrick Bouvier
2024-11-14 18:15   ` Richard Henderson
2024-11-14  1:12 ` [PATCH 04/24] accel/tcg: Include missing 'exec/translation-block.h' header Philippe Mathieu-Daudé
2024-11-14  4:11   ` Pierrick Bouvier
2024-11-14 18:23   ` Richard Henderson
2024-11-14  1:12 ` [PATCH 05/24] target/i386/helper: " Philippe Mathieu-Daudé
2024-11-14  4:11   ` Pierrick Bouvier
2024-11-14 18:42   ` Richard Henderson
2024-11-14  1:12 ` [PATCH 06/24] target/rx/cpu: " Philippe Mathieu-Daudé
2024-11-14  4:11   ` Pierrick Bouvier
2024-11-14 18:43   ` Richard Henderson
2024-11-14  1:12 ` [PATCH 07/24] system/watchpoint: Include missing 'exec/cpu-all.h' header Philippe Mathieu-Daudé
2024-11-14  4:11   ` Pierrick Bouvier
2024-11-14 18:53   ` Richard Henderson
2024-11-14  1:12 ` [PATCH 08/24] linux-user/aarch64/mte: Include missing 'user/abitypes.h' header Philippe Mathieu-Daudé
2024-11-14  4:11   ` Pierrick Bouvier
2024-11-14 18:59   ` Richard Henderson
2024-11-14  1:12 ` [PATCH 09/24] target/arm/mte: Restrict 'exec/ram_addr.h' to system emulation Philippe Mathieu-Daudé
2024-11-14  4:11   ` Pierrick Bouvier
2024-11-14 19:00   ` Richard Henderson
2024-11-14  1:12 ` [PATCH 10/24] target/arm/cpu: Restrict cpu_untagged_addr() to user emulation Philippe Mathieu-Daudé
2024-11-14  4:12   ` Pierrick Bouvier
2024-11-14 19:03   ` Richard Henderson
2024-11-14  1:12 ` [PATCH 11/24] exec: Introduce 'user/guest-host.h' header Philippe Mathieu-Daudé
2024-11-14  4:12   ` Pierrick Bouvier
2024-11-14 19:14   ` Richard Henderson
2024-11-14  1:12 ` [PATCH 12/24] accel/tcg: Have tlb_vaddr_to_host() use vaddr type Philippe Mathieu-Daudé
2024-11-14  4:12   ` Pierrick Bouvier
2024-11-14 19:16   ` Richard Henderson
2024-11-14  1:12 ` [PATCH 13/24] exec: Declare tlb_reset_dirty*() in 'exec/cputlb.h' Philippe Mathieu-Daudé
2024-11-14  4:12   ` Pierrick Bouvier
2024-11-14 19:19   ` Richard Henderson
2024-11-14 21:05     ` Philippe Mathieu-Daudé
2024-11-14  1:12 ` [PATCH 14/24] exec: Declare tlb_init/destroy() " Philippe Mathieu-Daudé
2024-11-14  4:13   ` Pierrick Bouvier
2024-11-14 19:21   ` Richard Henderson
2024-11-14 21:13     ` Philippe Mathieu-Daudé
2024-11-14  1:13 ` [PATCH 15/24] exec: Declare tlb_set_page_full() " Philippe Mathieu-Daudé
2024-11-14  4:13   ` Pierrick Bouvier
2024-11-14 19:24   ` Richard Henderson
2024-11-14  1:13 ` Philippe Mathieu-Daudé [this message]
2024-11-14  4:13   ` [PATCH 16/24] exec: Declare tlb_set_page_with_attrs() " Pierrick Bouvier
2024-11-14  1:13 ` [PATCH 17/24] exec: Declare tlb_set_page() " Philippe Mathieu-Daudé
2024-11-14  4:13   ` Pierrick Bouvier
2024-11-14  1:13 ` [PATCH 18/24] exec: Declare tlb_flush*() " Philippe Mathieu-Daudé
2024-11-14  4:14   ` Pierrick Bouvier
2024-11-14 19:30   ` Richard Henderson
2024-11-14  1:13 ` [PATCH 19/24] exec: Declare tlb_hit*() " Philippe Mathieu-Daudé
2024-11-14  4:14   ` Pierrick Bouvier
2024-11-14 19:37   ` Richard Henderson
2024-11-14  1:13 ` [PATCH 20/24] exec: Declare tlb_vaddr_to_host() " Philippe Mathieu-Daudé
2024-11-14  4:14   ` Pierrick Bouvier
2024-11-14 19:59   ` Richard Henderson
2024-11-14  1:13 ` [PATCH 21/24] exec: Extract CPU physical memory API to 'sysemu/physmem-target.h' Philippe Mathieu-Daudé
2024-11-14  1:17   ` Philippe Mathieu-Daudé
2024-11-14  4:15   ` Pierrick Bouvier
2024-11-14 20:51   ` Richard Henderson
2024-11-14  1:13 ` [PATCH 22/24] exec/cpu-common: Move ram_addr_t related methods to 'exec/ram_addr.h' Philippe Mathieu-Daudé
2024-11-14  4:15   ` Pierrick Bouvier
2024-11-14 20:47   ` Richard Henderson
2024-11-14  1:13 ` [PATCH 23/24] exec/memory: Move qemu_map_ram_ptr() declaration " Philippe Mathieu-Daudé
2024-11-14  4:16   ` Pierrick Bouvier
2024-11-14 20:48   ` Richard Henderson
2024-11-14  1:13 ` [PATCH 24/24] exec: Move 'ram_addr.h' header under sysemu/ namespace Philippe Mathieu-Daudé
2024-11-14  4:16   ` Pierrick Bouvier
2024-11-14 20:49   ` Richard Henderson

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