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From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Bin Meng" <bmeng.cn@gmail.com>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>,
	"open list:SD (Secure Card)" <qemu-block@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
	yunlin.tang@aspeedtech.com, "Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v3 2/3] hw/sd/sdhci: Introduce a new Write Protected pin inverted property
Date: Thu, 14 Nov 2024 17:48:38 +0800	[thread overview]
Message-ID: <20241114094839.4128404-3-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20241114094839.4128404-1-jamin_lin@aspeedtech.com>

The Write Protect pin of SDHCI model is default active low to match the SDHCI
spec. So, write enable the bit 19 should be 1 and write protected the bit 19
should be 0 at the Present State Register (0x24). However, some boards are
design Write Protected pin active high. In other words, write enable the bit 19
should be 0 and write protected the bit 19 should be 1 at the
Present State Register (0x24). To support it, introduces a new "wp-inverted"
property and set it false by default.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Acked-by: Cédric Le Goater <clg@redhat.com>
---
 hw/sd/sdhci.c         | 6 ++++++
 include/hw/sd/sdhci.h | 5 +++++
 2 files changed, 11 insertions(+)

diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 37875c02c3..06d1e24086 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -274,6 +274,10 @@ static void sdhci_set_readonly(DeviceState *dev, bool level)
 {
     SDHCIState *s = (SDHCIState *)dev;
 
+    if (s->wp_inverted) {
+        level = !level;
+    }
+
     if (level) {
         s->prnsts &= ~SDHC_WRITE_PROTECT;
     } else {
@@ -1550,6 +1554,8 @@ static Property sdhci_sysbus_properties[] = {
                      false),
     DEFINE_PROP_LINK("dma", SDHCIState,
                      dma_mr, TYPE_MEMORY_REGION, MemoryRegion *),
+    DEFINE_PROP_BOOL("wp-inverted", SDHCIState,
+                     wp_inverted, false),
     DEFINE_PROP_END_OF_LIST(),
 };
 
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index 6cd2822f1d..38c08e2859 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -100,6 +100,11 @@ struct SDHCIState {
     uint8_t sd_spec_version;
     uint8_t uhs_mode;
     uint8_t vendor;        /* For vendor specific functionality */
+    /*
+     * Write Protect pin default active low for detecting SD card
+     * to be protected. Set wp_inverted to invert the signal.
+     */
+    bool wp_inverted;
 };
 typedef struct SDHCIState SDHCIState;
 
-- 
2.34.1



  parent reply	other threads:[~2024-11-14  9:50 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-14  9:48 [PATCH v3 0/3] Introduce a new Write Protected pin inverted property Jamin Lin via
2024-11-14  9:48 ` [PATCH v3 1/3] hw/sd/sdhci: Fix coding style Jamin Lin via
2025-01-07 19:28   ` Philippe Mathieu-Daudé
2024-11-14  9:48 ` Jamin Lin via [this message]
2025-01-07 19:29   ` [PATCH v3 2/3] hw/sd/sdhci: Introduce a new Write Protected pin inverted property Philippe Mathieu-Daudé
2025-01-21 10:38   ` Cédric Le Goater
2025-01-22  2:04     ` Jamin Lin
2024-11-14  9:48 ` [PATCH v3 3/3] hw/arm/aspeed: Invert sdhci write protected pin for AST2600 EVB Jamin Lin via
2025-01-07 19:29   ` Philippe Mathieu-Daudé
2024-11-27  9:44 ` [PATCH v3 0/3] Introduce a new Write Protected pin inverted property Cédric Le Goater
2024-11-27 11:23   ` Philippe Mathieu-Daudé
2024-11-27 11:26     ` Cédric Le Goater
2024-11-28 11:06       ` Peter Maydell
2025-01-07 17:54         ` Cédric Le Goater
2025-01-07 22:36           ` Peter Maydell
2025-01-08  9:11             ` Cédric Le Goater
2024-11-28  5:37     ` Jamin Lin
2025-01-07 18:16     ` Cédric Le Goater

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