From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
qemu-arm@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
"Thomas Huth" <thuth@redhat.com>, "Anton Johansson" <anjo@rev.ng>,
"Bernhard Beschow" <shentey@gmail.com>,
"Alistair Francis" <alistair@alistair23.me>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Gustavo Romero" <gustavo.romero@linaro.org>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Jason Wang" <jasowang@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Edgar E . Iglesias" <edgar.iglesias@amd.com>
Subject: [PATCH RESEND v2 02/19] hw/net/xilinx_ethlite: Convert some debug logs to trace events
Date: Thu, 14 Nov 2024 21:59:53 +0100 [thread overview]
Message-ID: <20241114210010.34502-3-philmd@linaro.org> (raw)
In-Reply-To: <20241114210010.34502-1-philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
---
hw/net/xilinx_ethlite.c | 5 +++--
hw/net/trace-events | 4 ++++
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c
index e84b4cdd35..bb330a233f 100644
--- a/hw/net/xilinx_ethlite.c
+++ b/hw/net/xilinx_ethlite.c
@@ -30,6 +30,7 @@
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "net/net.h"
+#include "trace.h"
#define D(x)
#define R_TX_BUF0 0
@@ -198,13 +199,13 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size)
return size;
if (s->regs[rxbase + R_RX_CTRL0] & CTRL_S) {
- D(qemu_log("ethlite lost packet %x\n", s->regs[R_RX_CTRL0]));
+ trace_ethlite_pkt_lost(s->regs[R_RX_CTRL0]);
return -1;
}
D(qemu_log("%s %zd rxbase=%x\n", __func__, size, rxbase));
if (size > (R_MAX - R_RX_BUF0 - rxbase) * 4) {
- D(qemu_log("ethlite packet is too big, size=%x\n", size));
+ trace_ethlite_pkt_size_too_big(size);
return -1;
}
memcpy(&s->regs[rxbase + R_RX_BUF0], buf, size);
diff --git a/hw/net/trace-events b/hw/net/trace-events
index d0f1d8c0fb..2b36cd967e 100644
--- a/hw/net/trace-events
+++ b/hw/net/trace-events
@@ -511,3 +511,7 @@ xen_netdev_connect(int dev, unsigned int tx, unsigned int rx, int port) "vif%u t
xen_netdev_frontend_changed(const char *dev, int state) "vif%s state %d"
xen_netdev_tx(int dev, int ref, int off, int len, unsigned int flags, const char *c, const char *d, const char *m, const char *e) "vif%u ref %u off %u len %u flags 0x%x%s%s%s%s"
xen_netdev_rx(int dev, int idx, int status, int flags) "vif%u idx %d status %d flags 0x%x"
+
+# xilinx_ethlite.c
+ethlite_pkt_lost(uint32_t rx_ctrl) "rx_ctrl:0x%" PRIx32
+ethlite_pkt_size_too_big(uint64_t size) "size:0x%" PRIx64
--
2.45.2
next prev parent reply other threads:[~2024-11-14 21:05 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-14 20:59 [PATCH RESEND v2 00/19] hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls Philippe Mathieu-Daudé
2024-11-14 20:59 ` [PATCH RESEND v2 01/19] hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit Philippe Mathieu-Daudé
2024-11-14 20:59 ` Philippe Mathieu-Daudé [this message]
2024-11-14 20:59 ` [PATCH RESEND v2 03/19] hw/net/xilinx_ethlite: Remove unuseful debug logs Philippe Mathieu-Daudé
2024-11-14 20:59 ` [PATCH RESEND v2 04/19] hw/net/xilinx_ethlite: Update QOM style Philippe Mathieu-Daudé
2024-11-14 20:59 ` [PATCH RESEND v2 05/19] hw/net/xilinx_ethlite: Correct maximum RX buffer size Philippe Mathieu-Daudé
2024-11-14 20:59 ` [PATCH RESEND v2 06/19] hw/net/xilinx_ethlite: Map MDIO registers (as unimplemented) Philippe Mathieu-Daudé
2024-11-14 20:59 ` [PATCH RESEND v2 07/19] hw/net/xilinx_ethlite: Rename rxbuf -> port_index Philippe Mathieu-Daudé
2024-11-14 20:59 ` [PATCH RESEND v2 08/19] hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper Philippe Mathieu-Daudé
2024-11-14 21:00 ` [PATCH RESEND v2 09/19] hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper Philippe Mathieu-Daudé
2024-11-14 21:00 ` [PATCH RESEND v2 10/19] hw/net/xilinx_ethlite: Access TX_GIE register for each port Philippe Mathieu-Daudé
2024-11-14 21:00 ` [PATCH RESEND v2 11/19] hw/net/xilinx_ethlite: Access TX_LEN " Philippe Mathieu-Daudé
2024-11-14 21:00 ` [PATCH RESEND v2 12/19] hw/net/xilinx_ethlite: Access TX_CTRL " Philippe Mathieu-Daudé
2024-11-14 21:00 ` [PATCH RESEND v2 13/19] hw/net/xilinx_ethlite: Map RX_CTRL as MMIO Philippe Mathieu-Daudé
2024-11-14 21:00 ` [PATCH RESEND v2 14/19] hw/net/xilinx_ethlite: Map TX_LEN " Philippe Mathieu-Daudé
2024-11-14 21:00 ` [PATCH RESEND v2 15/19] hw/net/xilinx_ethlite: Map TX_GIE " Philippe Mathieu-Daudé
2024-11-14 21:00 ` [PATCH RESEND v2 16/19] hw/net/xilinx_ethlite: Map TX_CTRL " Philippe Mathieu-Daudé
2024-11-14 21:00 ` [PATCH RESEND v2 17/19] hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region Philippe Mathieu-Daudé
2024-11-14 21:00 ` [PATCH RESEND v2 18/19] hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container' Philippe Mathieu-Daudé
2024-11-14 21:00 ` [PATCH RESEND v2 19/19] hw/net/xilinx_ethlite: Map RESERVED I/O as unimplemented Philippe Mathieu-Daudé
2024-11-15 10:33 ` Alex Bennée
2025-01-12 18:17 ` [PATCH RESEND v2 00/19] hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls Philippe Mathieu-Daudé
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