From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Aleksandar Rikalo" <arikalo@gmail.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>
Subject: [PATCH v3 09/16] scripts/decodetree: Add support for 48-bit instructions
Date: Tue, 26 Nov 2024 14:59:55 +0100 [thread overview]
Message-ID: <20241126140003.74871-10-philmd@linaro.org> (raw)
In-Reply-To: <20241126140003.74871-1-philmd@linaro.org>
Some nanoMIPS instructions are encoded using 48-bit.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
scripts/decodetree.py | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/scripts/decodetree.py b/scripts/decodetree.py
index e8b72da3a97..88cd476d2d3 100644
--- a/scripts/decodetree.py
+++ b/scripts/decodetree.py
@@ -1543,6 +1543,10 @@ def main():
insntype = 'uint64_t'
insnmask = 0xffffffffffffffff
bitop_width = 64
+ elif insnwidth == 48:
+ insntype = 'uint64_t'
+ insnmask = 0xffffffffffff
+ bitop_width = 64
elif insnwidth != 32:
error(0, 'cannot handle insns of width', insnwidth)
elif o == '--test-for-error':
--
2.45.2
next prev parent reply other threads:[~2024-11-26 14:01 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-26 13:59 [PATCH v3 00/16] target/mips: Convert nanoMIPS LSA opcode to decodetree Philippe Mathieu-Daudé
2024-11-26 13:59 ` [PATCH v3 01/16] target/mips: Extract gen_base_index_addr() helper Philippe Mathieu-Daudé
2024-11-26 13:59 ` [PATCH v3 02/16] target/mips: Extract generic gen_lx() helper Philippe Mathieu-Daudé
2024-11-26 13:59 ` [PATCH v3 03/16] target/mips: Convert Octeon LX instructions to decodetree Philippe Mathieu-Daudé
2024-11-26 13:59 ` [PATCH v3 04/16] target/mips: Call translator_ld() in translate_insn() callees Philippe Mathieu-Daudé
2024-11-26 16:03 ` Richard Henderson
2024-11-26 13:59 ` [PATCH v3 05/16] target/mips: Have gen_[d]lsa() callers add 1 to shift amount argument Philippe Mathieu-Daudé
2024-11-26 13:59 ` [PATCH v3 06/16] target/mips: Decode LSA shift amount using decodetree function Philippe Mathieu-Daudé
2024-11-26 13:59 ` [PATCH v3 07/16] target/mips: Introduce decode tree bindings for MIPS16e ASE Philippe Mathieu-Daudé
2024-11-26 16:16 ` Richard Henderson
2024-11-26 13:59 ` [PATCH v3 08/16] target/mips: Introduce decode tree bindings for microMIPS ISA Philippe Mathieu-Daudé
2024-11-26 16:26 ` Richard Henderson
2024-11-26 13:59 ` Philippe Mathieu-Daudé [this message]
2024-11-26 16:27 ` [PATCH v3 09/16] scripts/decodetree: Add support for 48-bit instructions Richard Henderson
2024-11-26 13:59 ` [PATCH v3 10/16] target/mips: Introduce decode tree bindings for nanoMIPS ISA Philippe Mathieu-Daudé
2024-11-26 16:33 ` Richard Henderson
2024-11-26 13:59 ` [PATCH v3 11/16] target/mips: Convert microMIPS LSA opcode to decodetree Philippe Mathieu-Daudé
2024-11-26 13:59 ` [PATCH v3 12/16] target/mips: Convert nanoMIPS " Philippe Mathieu-Daudé
2024-11-26 13:59 ` [PATCH v3 13/16] target/mips: Add gen_li() helper Philippe Mathieu-Daudé
2024-11-26 16:36 ` Richard Henderson
2024-11-26 14:00 ` [PATCH v3 14/16] target/mips: Convert microMIPS LI opcode to decodetree Philippe Mathieu-Daudé
2024-11-26 21:25 ` Richard Henderson
2024-11-26 14:00 ` [PATCH v3 15/16] target/mips: Convert MIPS16e LI opcodes " Philippe Mathieu-Daudé
2024-11-26 21:55 ` Richard Henderson
2024-11-26 14:00 ` [PATCH v3 16/16] target/mips: Convert nanoMIPS " Philippe Mathieu-Daudé
2024-11-26 22:35 ` Richard Henderson
2025-07-15 6:02 ` [PATCH v3 00/16] target/mips: Convert nanoMIPS LSA opcode " Philippe Mathieu-Daudé
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