[PATCH-for-10.0 1/3] MAINTAINERS: Cover RISC-V HTIF interface

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

The HTIF interface is RISC-V specific, add
it within the MAINTAINERS section covering
hw/riscv/.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
IMHO 'RISC-V TCG CPUs' should cover target/riscv/ which are
the accelerator-facing implementations, and each machine or
device in hw/riscv/ should have its own section. Not going
to clean that in this patch.
---
 MAINTAINERS | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 2b1c4abed65..046e05dd28d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -324,8 +324,10 @@ S: Supported
 F: configs/targets/riscv*
 F: docs/system/target-riscv.rst
 F: target/riscv/
+F: hw/char/riscv_htif.c
 F: hw/riscv/
 F: hw/intc/riscv*
+F: include/hw/char/riscv_htif.h
 F: include/hw/riscv/
 F: linux-user/host/riscv32/
 F: linux-user/host/riscv64/
-- 
2.45.2