From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Weiwei Li" <liwei1518@gmail.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Bin Meng" <bmeng.cn@gmail.com>,
qemu-riscv@nongnu.org,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH-for-10.0 3/3] hw/char/riscv_htif: Clarify MemoryRegionOps expect 32-bit accesses
Date: Fri, 29 Nov 2024 16:43:04 +0100 [thread overview]
Message-ID: <20241129154304.34946-4-philmd@linaro.org> (raw)
In-Reply-To: <20241129154304.34946-1-philmd@linaro.org>
Looking at htif_mm_ops[] read/write handlers, we notice they
expect 32-bit values to accumulate into to the 'fromhost' and
'tohost' 64-bit variables. Explicit by setting the .impl
min/max fields.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
Notes
1/ these variables belong to HTIFState but are declared statically!
static uint64_t fromhost_addr, tohost_addr, begin_sig_addr, end_sig_addr;
2/ I believe a 64-bit implementation would simplify the logic.
3/ This is a non-QOM device model!
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/char/riscv_htif.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c
index 3f84d8d6738..db69b5e3ca7 100644
--- a/hw/char/riscv_htif.c
+++ b/hw/char/riscv_htif.c
@@ -325,6 +325,10 @@ static const MemoryRegionOps htif_mm_ops = {
.read = htif_mm_read,
.write = htif_mm_write,
.endianness = DEVICE_LITTLE_ENDIAN,
+ .impl = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
};
HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr,
--
2.45.2
next prev parent reply other threads:[~2024-11-29 15:43 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-29 15:43 [PATCH-for-10.0 0/3] hw/char/riscv_htif: Remove tswap64() calls Philippe Mathieu-Daudé
2024-11-29 15:43 ` [PATCH-for-10.0 1/3] MAINTAINERS: Cover RISC-V HTIF interface Philippe Mathieu-Daudé
2024-11-29 17:04 ` Daniel Henrique Barboza
2024-12-03 4:50 ` Alistair Francis
2024-11-29 15:43 ` [PATCH-for-10.0 2/3] hw/char/riscv_htif: Explicit little-endian implementation Philippe Mathieu-Daudé
2024-11-29 17:05 ` Daniel Henrique Barboza
2024-12-03 5:54 ` Alistair Francis
2024-11-29 15:43 ` Philippe Mathieu-Daudé [this message]
2024-11-29 17:08 ` [PATCH-for-10.0 3/3] hw/char/riscv_htif: Clarify MemoryRegionOps expect 32-bit accesses Daniel Henrique Barboza
2024-12-03 5:56 ` Alistair Francis
2024-12-03 6:35 ` [PATCH-for-10.0 0/3] hw/char/riscv_htif: Remove tswap64() calls Alistair Francis
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