From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH 29/67] target/arm: Convert FRINT{32, 64}[ZX] (scalar) to decodetree
Date: Sun, 1 Dec 2024 09:05:28 -0600 [thread overview]
Message-ID: <20241201150607.12812-30-richard.henderson@linaro.org> (raw)
In-Reply-To: <20241201150607.12812-1-richard.henderson@linaro.org>
Remove handle_fp_1src_single and handle_fp_1src_double as
these were the last insns decoded by those functions.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/translate-a64.c | 150 ++++-----------------------------
target/arm/tcg/a64.decode | 5 ++
2 files changed, 21 insertions(+), 134 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index b713c7d184..679bdd826c 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -8429,112 +8429,23 @@ static const FPScalar1 f_scalar_bfcvt = {
};
TRANS_FEAT(BFCVT_s, aa64_bf16, do_fp1_scalar, a, &f_scalar_bfcvt, -1)
-/* Floating-point data-processing (1 source) - single precision */
-static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
-{
- void (*gen_fpst)(TCGv_i32, TCGv_i32, TCGv_ptr);
- TCGv_i32 tcg_op, tcg_res;
- TCGv_ptr fpst;
- int rmode = -1;
+static const FPScalar1 f_scalar_frint32 = {
+ NULL,
+ gen_helper_frint32_s,
+ gen_helper_frint32_d,
+};
+TRANS_FEAT(FRINT32Z_s, aa64_frint, do_fp1_scalar, a,
+ &f_scalar_frint32, FPROUNDING_ZERO)
+TRANS_FEAT(FRINT32X_s, aa64_frint, do_fp1_scalar, a, &f_scalar_frint32, -1)
- tcg_op = read_fp_sreg(s, rn);
- tcg_res = tcg_temp_new_i32();
-
- switch (opcode) {
- case 0x10: /* FRINT32Z */
- rmode = FPROUNDING_ZERO;
- gen_fpst = gen_helper_frint32_s;
- break;
- case 0x11: /* FRINT32X */
- gen_fpst = gen_helper_frint32_s;
- break;
- case 0x12: /* FRINT64Z */
- rmode = FPROUNDING_ZERO;
- gen_fpst = gen_helper_frint64_s;
- break;
- case 0x13: /* FRINT64X */
- gen_fpst = gen_helper_frint64_s;
- break;
- default:
- case 0x0: /* FMOV */
- case 0x1: /* FABS */
- case 0x2: /* FNEG */
- case 0x3: /* FSQRT */
- case 0x6: /* BFCVT */
- case 0x8: /* FRINTN */
- case 0x9: /* FRINTP */
- case 0xa: /* FRINTM */
- case 0xb: /* FRINTZ */
- case 0xc: /* FRINTA */
- case 0xf: /* FRINTI */
- case 0xe: /* FRINTX */
- g_assert_not_reached();
- }
-
- fpst = fpstatus_ptr(FPST_FPCR);
- if (rmode >= 0) {
- TCGv_i32 tcg_rmode = gen_set_rmode(rmode, fpst);
- gen_fpst(tcg_res, tcg_op, fpst);
- gen_restore_rmode(tcg_rmode, fpst);
- } else {
- gen_fpst(tcg_res, tcg_op, fpst);
- }
-
- write_fp_sreg(s, rd, tcg_res);
-}
-
-/* Floating-point data-processing (1 source) - double precision */
-static void handle_fp_1src_double(DisasContext *s, int opcode, int rd, int rn)
-{
- void (*gen_fpst)(TCGv_i64, TCGv_i64, TCGv_ptr);
- TCGv_i64 tcg_op, tcg_res;
- TCGv_ptr fpst;
- int rmode = -1;
-
- tcg_op = read_fp_dreg(s, rn);
- tcg_res = tcg_temp_new_i64();
-
- switch (opcode) {
- case 0x10: /* FRINT32Z */
- rmode = FPROUNDING_ZERO;
- gen_fpst = gen_helper_frint32_d;
- break;
- case 0x11: /* FRINT32X */
- gen_fpst = gen_helper_frint32_d;
- break;
- case 0x12: /* FRINT64Z */
- rmode = FPROUNDING_ZERO;
- gen_fpst = gen_helper_frint64_d;
- break;
- case 0x13: /* FRINT64X */
- gen_fpst = gen_helper_frint64_d;
- break;
- default:
- case 0x0: /* FMOV */
- case 0x1: /* FABS */
- case 0x2: /* FNEG */
- case 0x3: /* FSQRT */
- case 0x8: /* FRINTN */
- case 0x9: /* FRINTP */
- case 0xa: /* FRINTM */
- case 0xb: /* FRINTZ */
- case 0xc: /* FRINTA */
- case 0xf: /* FRINTI */
- case 0xe: /* FRINTX */
- g_assert_not_reached();
- }
-
- fpst = fpstatus_ptr(FPST_FPCR);
- if (rmode >= 0) {
- TCGv_i32 tcg_rmode = gen_set_rmode(rmode, fpst);
- gen_fpst(tcg_res, tcg_op, fpst);
- gen_restore_rmode(tcg_rmode, fpst);
- } else {
- gen_fpst(tcg_res, tcg_op, fpst);
- }
-
- write_fp_dreg(s, rd, tcg_res);
-}
+static const FPScalar1 f_scalar_frint64 = {
+ NULL,
+ gen_helper_frint64_s,
+ gen_helper_frint64_d,
+};
+TRANS_FEAT(FRINT64Z_s, aa64_frint, do_fp1_scalar, a,
+ &f_scalar_frint64, FPROUNDING_ZERO)
+TRANS_FEAT(FRINT64X_s, aa64_frint, do_fp1_scalar, a, &f_scalar_frint64, -1)
static void handle_fp_fcvt(DisasContext *s, int opcode,
int rd, int rn, int dtype, int ntype)
@@ -8635,35 +8546,6 @@ static void disas_fp_1src(DisasContext *s, uint32_t insn)
break;
}
- case 0x10 ... 0x13: /* FRINT{32,64}{X,Z} */
- if (type > 1 || !dc_isar_feature(aa64_frint, s)) {
- goto do_unallocated;
- }
- /* fall through */
- case 0x0 ... 0x3:
- case 0x8 ... 0xc:
- case 0xe ... 0xf:
- /* 32-to-32 and 64-to-64 ops */
- switch (type) {
- case 0:
- if (!fp_access_check(s)) {
- return;
- }
- handle_fp_1src_single(s, opcode, rd, rn);
- break;
- case 1:
- if (!fp_access_check(s)) {
- return;
- }
- handle_fp_1src_double(s, opcode, rd, rn);
- break;
- case 3:
- default:
- goto do_unallocated;
- }
- break;
-
- case 0x6:
default:
do_unallocated:
unallocated_encoding(s);
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index 476989c1b4..e828834c16 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -1340,6 +1340,11 @@ FRINTI_s 00011110 .. 1 001111 10000 ..... ..... @rr_hsd
BFCVT_s 00011110 10 1 000110 10000 ..... ..... @rr_s
+FRINT32Z_s 00011110 0. 1 010000 10000 ..... ..... @rr_sd
+FRINT32X_s 00011110 0. 1 010001 10000 ..... ..... @rr_sd
+FRINT64Z_s 00011110 0. 1 010010 10000 ..... ..... @rr_sd
+FRINT64X_s 00011110 0. 1 010011 10000 ..... ..... @rr_sd
+
# Floating-point Immediate
FMOVI_s 0001 1110 .. 1 imm:8 100 00000 rd:5 esz=%esz_hsd
--
2.43.0
next prev parent reply other threads:[~2024-12-01 15:07 UTC|newest]
Thread overview: 147+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-01 15:04 [PATCH 00/67] target/arm: AArch64 decodetree conversion, final part Richard Henderson
2024-12-01 15:05 ` [PATCH 01/67] target/arm: Use ### to separate 3rd-level sections in a64.decode Richard Henderson
2024-12-02 14:12 ` Philippe Mathieu-Daudé
2024-12-01 15:05 ` [PATCH 02/67] target/arm: Convert UDIV, SDIV to decodetree Richard Henderson
2024-12-02 13:49 ` Philippe Mathieu-Daudé
2024-12-01 15:05 ` [PATCH 03/67] target/arm: Convert LSLV, LSRV, ASRV, RORV " Richard Henderson
2024-12-02 19:31 ` Philippe Mathieu-Daudé
2024-12-01 15:05 ` [PATCH 04/67] target/arm: Convert CRC32, CRC32C " Richard Henderson
2024-12-02 14:01 ` Philippe Mathieu-Daudé
2024-12-02 17:49 ` Richard Henderson
2024-12-02 21:04 ` Philippe Mathieu-Daudé
2024-12-01 15:05 ` [PATCH 05/67] target/arm: Convert SUBP, IRG, GMI " Richard Henderson
2024-12-02 14:05 ` Philippe Mathieu-Daudé
2024-12-01 15:05 ` [PATCH 06/67] target/arm: Convert PACGA " Richard Henderson
2024-12-02 10:30 ` Philippe Mathieu-Daudé
2024-12-01 15:05 ` [PATCH 07/67] target/arm: Convert RBIT, REV16, REV32, REV64 " Richard Henderson
2024-12-05 17:22 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 08/67] target/arm: Convert CLZ, CLS " Richard Henderson
2024-12-02 14:08 ` Philippe Mathieu-Daudé
2024-12-01 15:05 ` [PATCH 09/67] target/arm: Convert PAC[ID]*, AUT[ID]* " Richard Henderson
2024-12-05 17:29 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 10/67] target/arm: Convert XPAC[ID] " Richard Henderson
2024-12-02 14:11 ` Philippe Mathieu-Daudé
2024-12-01 15:05 ` [PATCH 11/67] target/arm: Convert disas_logic_reg " Richard Henderson
2024-12-05 17:38 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 12/67] target/arm: Convert disas_add_sub_ext_reg " Richard Henderson
2024-12-05 17:42 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 13/67] target/arm: Convert disas_add_sub_reg " Richard Henderson
2024-12-05 17:45 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 14/67] target/arm: Convert disas_data_proc_3src " Richard Henderson
2024-12-05 17:55 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 15/67] target/arm: Convert disas_adc_sbc " Richard Henderson
2024-12-05 17:47 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 16/67] target/arm: Convert RMIF " Richard Henderson
2024-12-02 9:58 ` Philippe Mathieu-Daudé
2024-12-01 15:05 ` [PATCH 17/67] target/arm: Convert SETF8, SETF16 " Richard Henderson
2024-12-05 20:28 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 18/67] target/arm: Convert CCMP, CCMN " Richard Henderson
2024-12-05 20:32 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 19/67] target/arm: Convert disas_cond_select " Richard Henderson
2024-12-05 20:34 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 20/67] target/arm: Introduce fp_access_check_scalar_hsd Richard Henderson
2024-12-05 20:37 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 21/67] target/arm: Introduce fp_access_check_vector_hsd Richard Henderson
2024-12-05 20:37 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 22/67] target/arm: Convert FCMP, FCMPE, FCCMP, FCCMPE to decodetree Richard Henderson
2024-12-05 21:21 ` Peter Maydell
2024-12-05 21:27 ` Peter Maydell
2024-12-06 1:31 ` Richard Henderson
2024-12-01 15:05 ` [PATCH 23/67] target/arm: Convert FMOV, FABS, FNEG (scalar) " Richard Henderson
2024-12-05 21:12 ` Peter Maydell
2024-12-06 1:52 ` Richard Henderson
2024-12-06 2:34 ` Richard Henderson
2024-12-01 15:05 ` [PATCH 24/67] target/arm: Pass fpstatus to vfp_sqrt* Richard Henderson
2024-12-05 20:44 ` Peter Maydell
2024-12-06 2:01 ` Richard Henderson
2024-12-05 21:20 ` Philippe Mathieu-Daudé
2024-12-05 21:38 ` Peter Maydell
2024-12-05 21:40 ` Philippe Mathieu-Daudé
2024-12-01 15:05 ` [PATCH 25/67] target/arm: Remove helper_sqrt_f16 Richard Henderson
2024-12-04 8:51 ` Philippe Mathieu-Daudé
2024-12-01 15:05 ` [PATCH 26/67] target/arm: Convert FSQRT (scalar) to decodetree Richard Henderson
2024-12-06 13:19 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 27/67] target/arm: Convert FRINT[NPMSAXI] " Richard Henderson
2024-12-06 13:23 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 28/67] target/arm: Convert BFCVT " Richard Henderson
2024-12-03 14:05 ` Peter Maydell
2024-12-03 15:28 ` Richard Henderson
2024-12-01 15:05 ` Richard Henderson [this message]
2024-12-06 13:25 ` [PATCH 29/67] target/arm: Convert FRINT{32, 64}[ZX] (scalar) " Peter Maydell
2024-12-01 15:05 ` [PATCH 30/67] target/arm: Convert FCVT " Richard Henderson
2024-12-06 13:32 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 31/67] target/arm: Convert handle_fpfpcvt " Richard Henderson
2024-12-06 13:48 ` Peter Maydell
2024-12-06 15:10 ` Richard Henderson
2024-12-01 15:05 ` [PATCH 32/67] target/arm: Convert FJCVTZS " Richard Henderson
2024-12-06 13:51 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 33/67] target/arm: Convert handle_fmov " Richard Henderson
2024-12-06 14:21 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 34/67] target/arm: Convert SQABS, SQNEG " Richard Henderson
2024-12-06 14:28 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 35/67] target/arm: Convert ABS, NEG " Richard Henderson
2024-12-06 14:30 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 36/67] target/arm: Introduce gen_gvec_cls, gen_gvec_clz Richard Henderson
2024-12-02 16:29 ` Philippe Mathieu-Daudé
2024-12-02 17:56 ` Richard Henderson
2024-12-01 15:05 ` [PATCH 37/67] target/arm: Convert CLS, CLZ (vector) to decodetree Richard Henderson
2024-12-06 14:40 ` Peter Maydell
2024-12-06 15:52 ` Richard Henderson
2024-12-01 15:05 ` [PATCH 38/67] target/arm: Introduce gen_gvec_cnt, gen_gvec_rbit Richard Henderson
2024-12-06 15:02 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 39/67] target/arm: Convert CNT, NOT, RBIT (vector) to decodetree Richard Henderson
2024-12-06 15:03 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 40/67] target/arm: Convert CMGT, CMGE, GMLT, GMLE, CMEQ (zero) " Richard Henderson
2024-12-06 15:06 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 41/67] target/arm: Introduce gen_gvec_rev{16,32,64} Richard Henderson
2024-12-06 15:09 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 42/67] target/arm: Convert handle_rev to decodetree Richard Henderson
2024-12-03 11:49 ` Peter Maydell
2024-12-03 14:09 ` Richard Henderson
2024-12-01 15:05 ` [PATCH 43/67] target/arm: Move helper_neon_addlp_{s8, s16} to neon_helper.c Richard Henderson
2024-12-06 15:10 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 44/67] target/arm: Introduce gen_gvec_{s,u}{add,ada}lp Richard Henderson
2024-12-06 15:36 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 45/67] target/arm: Convert handle_2misc_pairwise to decodetree Richard Henderson
2024-12-06 15:37 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 46/67] target/arm: Remove helper_neon_{add,sub}l_u{16,32} Richard Henderson
2024-12-06 15:15 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 47/67] target/arm: Introduce clear_vec Richard Henderson
2024-12-02 16:33 ` Philippe Mathieu-Daudé
2024-12-01 15:05 ` [PATCH 48/67] target/arm: Convert XTN, SQXTUN, SQXTN, UQXTN to decodetree Richard Henderson
2024-12-06 15:46 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 49/67] target/arm: Convert FCVTN, BFCVTN " Richard Henderson
2024-12-06 15:48 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 50/67] target/arm: Convert FCVTXN " Richard Henderson
2024-12-06 15:50 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 51/67] target/arm: Convert SHLL " Richard Henderson
2024-12-06 15:52 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 52/67] target/arm: Convert FABS, FNEG (vector) " Richard Henderson
2024-12-06 16:03 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 53/67] target/arm: Convert FSQRT " Richard Henderson
2024-12-06 16:11 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 54/67] target/arm: Convert FRINT* " Richard Henderson
2024-12-06 16:12 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 55/67] target/arm: Convert FCVT* (vector, integer) scalar " Richard Henderson
2024-12-06 16:23 ` Peter Maydell
2024-12-06 18:12 ` Richard Henderson
2024-12-01 15:05 ` [PATCH 56/67] target/arm: Convert FCVT* (vector, fixed-point) " Richard Henderson
2024-12-01 15:05 ` [PATCH 57/67] target/arm: Convert [US]CVTF (vector, integer) " Richard Henderson
2024-12-06 16:24 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 58/67] target/arm: Convert [US]CVTF (vector, fixed-point) " Richard Henderson
2024-12-06 16:27 ` Peter Maydell
2024-12-06 18:15 ` Richard Henderson
2024-12-01 15:05 ` [PATCH 59/67] target/arm: Rename helper_gvec_vcvt_[hf][su] with _rz Richard Henderson
2024-12-06 16:28 ` Peter Maydell
2024-12-01 15:05 ` [PATCH 60/67] target/arm: Convert [US]CVTF (vector) to decodetree Richard Henderson
2024-12-01 15:06 ` [PATCH 61/67] target/arm: Convert FCVTZ[SU] (vector, fixed-point) " Richard Henderson
2024-12-01 15:06 ` [PATCH 62/67] target/arm: Convert FCVT* (vector, integer) " Richard Henderson
2024-12-01 15:06 ` [PATCH 63/67] target/arm: Convert handle_2misc_fcmp_zero " Richard Henderson
2024-12-06 16:29 ` Peter Maydell
2024-12-01 15:06 ` [PATCH 64/67] target/arm: Convert FRECPE, FRECPX, FRSQRTE " Richard Henderson
2024-12-06 16:31 ` Peter Maydell
2024-12-01 15:06 ` [PATCH 65/67] target/arm: Introduce gen_gvec_urecpe, gen_gvec_ursqrte Richard Henderson
2024-12-01 15:06 ` [PATCH 66/67] target/arm: Convert URECPE and URSQRTE to decodetree Richard Henderson
2024-12-01 15:06 ` [PATCH 67/67] target/arm: Convert FCVTL " Richard Henderson
2024-12-06 16:33 ` Peter Maydell
2024-12-09 10:29 ` [PATCH 00/67] target/arm: AArch64 decodetree conversion, final part Peter Maydell
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