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From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
	<yunlin.tang@aspeedtech.com>
Subject: [PATCH v2 1/6] hw/sd/aspeed_sdhci: Fix coding style
Date: Tue, 3 Dec 2024 10:14:55 +0800	[thread overview]
Message-ID: <20241203021500.3986213-2-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20241203021500.3986213-1-jamin_lin@aspeedtech.com>

Fix coding style issues from checkpatch.pl.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 hw/sd/aspeed_sdhci.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/sd/aspeed_sdhci.c b/hw/sd/aspeed_sdhci.c
index 98d5460905..acd6538261 100644
--- a/hw/sd/aspeed_sdhci.c
+++ b/hw/sd/aspeed_sdhci.c
@@ -87,10 +87,12 @@ static void aspeed_sdhci_write(void *opaque, hwaddr addr, uint64_t val,
         sdhci->regs[TO_REG(addr)] = (uint32_t)val & ~ASPEED_SDHCI_INFO_RESET;
         break;
     case ASPEED_SDHCI_SDIO_140:
-        sdhci->slots[0].capareg = deposit64(sdhci->slots[0].capareg, 0, 32, val);
+        sdhci->slots[0].capareg = deposit64(sdhci->slots[0].capareg,
+                                            0, 32, val);
         break;
     case ASPEED_SDHCI_SDIO_144:
-        sdhci->slots[0].capareg = deposit64(sdhci->slots[0].capareg, 32, 32, val);
+        sdhci->slots[0].capareg = deposit64(sdhci->slots[0].capareg,
+                                            32, 32, val);
         break;
     case ASPEED_SDHCI_SDIO_148:
         sdhci->slots[0].maxcurr = deposit64(sdhci->slots[0].maxcurr,
-- 
2.34.1



  reply	other threads:[~2024-12-03  2:16 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-03  2:14 [PATCH v2 0/6] Support SDHCI and eMMC for ast2700 Jamin Lin via
2024-12-03  2:14 ` Jamin Lin via [this message]
2024-12-03  2:14 ` [PATCH v2 2/6] hw/arm/aspeed: Fix coding style Jamin Lin via
2024-12-03  2:14 ` [PATCH v2 3/6] hw:sdhci: Introduce a new "capareg" class member to set the different Capability Registers Jamin Lin via
2024-12-03  9:29   ` Philippe Mathieu-Daudé
2024-12-04  7:52     ` Jamin Lin
2024-12-03 20:23   ` Bernhard Beschow
2024-12-04  3:14     ` Jamin Lin
2024-12-04  5:59       ` Philippe Mathieu-Daudé
2024-12-04  7:54         ` Jamin Lin
2024-12-03  2:14 ` [PATCH v2 4/6] hw/sd/aspeed_sdhci: Add AST2700 Support Jamin Lin via
2024-12-03  2:14 ` [PATCH v2 5/6] aspeed/soc: Support SDHCI for AST2700 Jamin Lin via
2024-12-03  2:15 ` [PATCH v2 6/6] aspeed/soc: Support eMMC " Jamin Lin via

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