From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
<yunlin.tang@aspeedtech.com>
Subject: [PATCH v2 5/6] aspeed/soc: Support SDHCI for AST2700
Date: Tue, 3 Dec 2024 10:14:59 +0800 [thread overview]
Message-ID: <20241203021500.3986213-6-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20241203021500.3986213-1-jamin_lin@aspeedtech.com>
Add SDHCI model for AST2700 SDHCI support. The SDHCI controller only support 1
slot and registers base address is start at 0x1408_0000 and its interrupt is
connected to GICINT133_INTC at bit 1.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index 63d1fcb086..baddd35ecf 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -65,6 +65,7 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = {
[ASPEED_DEV_I2C] = 0x14C0F000,
[ASPEED_DEV_GPIO] = 0x14C0B000,
[ASPEED_DEV_RTC] = 0x12C0F000,
+ [ASPEED_DEV_SDHCI] = 0x14080000,
};
#define AST2700_MAX_IRQ 256
@@ -113,6 +114,7 @@ static const int aspeed_soc_ast2700_irqmap[] = {
[ASPEED_DEV_KCS] = 128,
[ASPEED_DEV_DP] = 28,
[ASPEED_DEV_I3C] = 131,
+ [ASPEED_DEV_SDHCI] = 133,
};
/* GICINT 128 */
@@ -158,6 +160,7 @@ static const int aspeed_soc_ast2700_gic132_intcmap[] = {
/* GICINT 133 */
static const int aspeed_soc_ast2700_gic133_intcmap[] = {
+ [ASPEED_DEV_SDHCI] = 1,
[ASPEED_DEV_PECI] = 4,
};
@@ -380,6 +383,14 @@ static void aspeed_soc_ast2700_init(Object *obj)
object_initialize_child(obj, "gpio", &s->gpio, typename);
object_initialize_child(obj, "rtc", &s->rtc, TYPE_ASPEED_RTC);
+
+ snprintf(typename, sizeof(typename), "aspeed.sdhci-%s", socname);
+ object_initialize_child(obj, "sd-controller", &s->sdhci, typename);
+ object_property_set_int(OBJECT(&s->sdhci), "num-slots", 1, &error_abort);
+
+ /* Init sd card slot class here so that they're under the correct parent */
+ object_initialize_child(obj, "sd-controller.sdhci",
+ &s->sdhci.slots[0], TYPE_SYSBUS_SDHCI);
}
/*
@@ -681,6 +692,15 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_RTC));
+ /* SDHCI */
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
+ return;
+ }
+ aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdhci), 0,
+ sc->memmap[ASPEED_DEV_SDHCI]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
+ aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI));
+
create_unimplemented_device("ast2700.dpmcu", 0x11000000, 0x40000);
create_unimplemented_device("ast2700.iomem0", 0x12000000, 0x01000000);
create_unimplemented_device("ast2700.iomem1", 0x14000000, 0x01000000);
--
2.34.1
next prev parent reply other threads:[~2024-12-03 2:16 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-03 2:14 [PATCH v2 0/6] Support SDHCI and eMMC for ast2700 Jamin Lin via
2024-12-03 2:14 ` [PATCH v2 1/6] hw/sd/aspeed_sdhci: Fix coding style Jamin Lin via
2024-12-03 2:14 ` [PATCH v2 2/6] hw/arm/aspeed: " Jamin Lin via
2024-12-03 2:14 ` [PATCH v2 3/6] hw:sdhci: Introduce a new "capareg" class member to set the different Capability Registers Jamin Lin via
2024-12-03 9:29 ` Philippe Mathieu-Daudé
2024-12-04 7:52 ` Jamin Lin
2024-12-03 20:23 ` Bernhard Beschow
2024-12-04 3:14 ` Jamin Lin
2024-12-04 5:59 ` Philippe Mathieu-Daudé
2024-12-04 7:54 ` Jamin Lin
2024-12-03 2:14 ` [PATCH v2 4/6] hw/sd/aspeed_sdhci: Add AST2700 Support Jamin Lin via
2024-12-03 2:14 ` Jamin Lin via [this message]
2024-12-03 2:15 ` [PATCH v2 6/6] aspeed/soc: Support eMMC for AST2700 Jamin Lin via
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