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From: Alex Williamson <alex.williamson@redhat.com>
To: Tomita Moeko <tomitamoeko@gmail.com>
Cc: qemu-devel@nongnu.org, "Cédric Le Goater" <clg@redhat.com>,
	"Corvin Köhne" <c.koehne@beckhoff.com>
Subject: Re: [PATCH v2 6/9] vfio/igd: add macro for declaring mirrored registers
Date: Wed, 4 Dec 2024 15:35:49 -0700	[thread overview]
Message-ID: <20241204153549.2453c3a5.alex.williamson@redhat.com> (raw)
In-Reply-To: <20241203133548.38252-7-tomitamoeko@gmail.com>

On Tue,  3 Dec 2024 21:35:45 +0800
Tomita Moeko <tomitamoeko@gmail.com> wrote:

> igd devices have multipe registers mirroring mmio address and pci
> config space, more than a single BDSM register. To support this,
> the read/write functions are made common and a macro is defined to
> simplify the declaration of MemoryRegionOps.
> 
> Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com>
> ---
>  hw/vfio/igd.c | 60 ++++++++++++++++++++++++++++++---------------------
>  1 file changed, 35 insertions(+), 25 deletions(-)
> 
> diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c
> index fea9be0b2d..522845c509 100644
> --- a/hw/vfio/igd.c
> +++ b/hw/vfio/igd.c
> @@ -418,16 +418,9 @@ static const MemoryRegionOps vfio_igd_index_quirk = {
>      .endianness = DEVICE_LITTLE_ENDIAN,
>  };
>  
> -#define IGD_BDSM_MMIO_OFFSET 0x1080C0
> -
> -static uint64_t vfio_igd_quirk_bdsm_read(void *opaque,
> -                                          hwaddr addr, unsigned size)
> +static uint64_t vfio_igd_pci_config_read(VFIOPCIDevice *vdev, uint64_t offset,
> +                                         unsigned size)
>  {
> -    VFIOPCIDevice *vdev = opaque;
> -    uint64_t offset;
> -
> -    offset = IGD_BDSM_GEN11 + addr;
> -
>      switch (size) {
>      case 1:
>          return pci_get_byte(vdev->pdev.config + offset);
> @@ -438,21 +431,17 @@ static uint64_t vfio_igd_quirk_bdsm_read(void *opaque,
>      case 8:
>          return pci_get_quad(vdev->pdev.config + offset);
>      default:
> -        hw_error("igd: unsupported read size, %u bytes", size);
> +        hw_error("igd: unsupported pci config read at %lx, size %u",
> +                 offset, size);
>          break;
>      }
>  
>      return 0;
>  }
>  
> -static void vfio_igd_quirk_bdsm_write(void *opaque, hwaddr addr,
> -                                       uint64_t data, unsigned size)
> +static void vfio_igd_pci_config_write(VFIOPCIDevice *vdev, uint64_t offset,
> +                                      uint64_t data, unsigned size)
>  {
> -    VFIOPCIDevice *vdev = opaque;
> -    uint64_t offset;
> -
> -    offset = IGD_BDSM_GEN11 + addr;
> -
>      switch (size) {
>      case 1:
>          pci_set_byte(vdev->pdev.config + offset, data);
> @@ -467,17 +456,37 @@ static void vfio_igd_quirk_bdsm_write(void *opaque, hwaddr addr,
>          pci_set_quad(vdev->pdev.config + offset, data);
>          break;
>      default:
> -        hw_error("igd: unsupported read size, %u bytes", size);
> +        hw_error("igd: unsupported pci config write at %lx, size %u",
> +                 offset, size);
>          break;
>      }
>  }
>  
> -static const MemoryRegionOps vfio_igd_bdsm_quirk = {
> -    .read = vfio_igd_quirk_bdsm_read,
> -    .write = vfio_igd_quirk_bdsm_write,
> -    .endianness = DEVICE_LITTLE_ENDIAN,
> +#define VFIO_IGD_QUIRK_MIRROR_REG(reg, name)                            \
> +static uint64_t vfio_igd_quirk_read_##name(void *opaque,                \
> +                                           hwaddr addr, unsigned size)  \
> +{                                                                       \
> +    VFIOPCIDevice *vdev = opaque;                                       \

I'm not sure if QEMU coding style requires this, but I'd still prefer
to see a blank line after variable declaration, even in a macro.

> +    return vfio_igd_pci_config_read(vdev, reg + addr, size);            \
> +}                                                                       \
> +                                                                        \
> +static void vfio_igd_quirk_write_##name(void *opaque, hwaddr addr,      \
> +                                        uint64_t data, unsigned size)   \
> +{                                                                       \
> +    VFIOPCIDevice *vdev = opaque;                                       \
> +    vfio_igd_pci_config_write(vdev, reg + addr, data, size);            \
> +}                                                                       \
> +                                                                        \
> +static const MemoryRegionOps vfio_igd_quirk_mirror_##name = {           \
> +    .read = vfio_igd_quirk_read_##name,                                 \
> +    .write = vfio_igd_quirk_write_##name,                               \
> +    .endianness = DEVICE_LITTLE_ENDIAN,                                 \
>  };
>  
> +VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM_GEN11, bdsm)
> +
> +#define IGD_BDSM_MMIO_OFFSET    0x1080C0
> +
>  void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr)
>  {
>      VFIOQuirk *quirk;
> @@ -507,10 +516,11 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr)
>      quirk = vfio_quirk_alloc(1);
>      quirk->data = vdev;
>  
> -    memory_region_init_io(&quirk->mem[0], OBJECT(vdev), &vfio_igd_bdsm_quirk,
> -                          vdev, "vfio-igd-bdsm-quirk", 8);
> +    memory_region_init_io(&quirk->mem[1], OBJECT(vdev),
> +                          &vfio_igd_quirk_mirror_bdsm, vdev,
> +                          "vfio-igd-bdsm-quirk", 8);
>      memory_region_add_subregion_overlap(vdev->bars[0].region.mem,
> -                                        IGD_BDSM_MMIO_OFFSET, &quirk->mem[0],
> +                                        IGD_BDSM_MMIO_OFFSET, &quirk->mem[1],

As Corvin notes, changing the quirk memory region index here is a bug.
Thanks,

Alex



  parent reply	other threads:[~2024-12-04 22:36 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-03 13:35 [PATCH v2 0/9] vfio/igd: Enable legacy mode on more devices Tomita Moeko
2024-12-03 13:35 ` [PATCH v2 1/9] vfio/igd: remove unsupported device ids Tomita Moeko
2024-12-03 13:35 ` [PATCH v2 2/9] vfio/igd: align generation with i915 kernel driver Tomita Moeko
2024-12-03 16:07   ` Corvin Köhne
2024-12-04 22:36   ` Alex Williamson
2024-12-05  9:26     ` Tomita Moeko
2024-12-03 13:35 ` [PATCH v2 3/9] vfio/igd: canonicalize memory size calculations Tomita Moeko
2024-12-03 16:12   ` Corvin Köhne
2024-12-04 22:35   ` Alex Williamson
2024-12-05 10:13     ` Tomita Moeko
2024-12-03 13:35 ` [PATCH v2 4/9] vfio/igd: add Gemini Lake and Comet Lake device ids Tomita Moeko
2024-12-03 16:15   ` Corvin Köhne
2024-12-03 13:35 ` [PATCH v2 5/9] vfio/igd: add Alder/Raptor/Rocket/Ice/Jasper " Tomita Moeko
2024-12-03 16:18   ` Corvin Köhne
2024-12-03 13:35 ` [PATCH v2 6/9] vfio/igd: add macro for declaring mirrored registers Tomita Moeko
2024-12-03 16:22   ` Corvin Köhne
2024-12-04 22:35   ` Alex Williamson [this message]
2024-12-03 13:35 ` [PATCH v2 7/9] vfio/igd: emulate GGC register in mmio bar0 Tomita Moeko
2024-12-04 22:35   ` Alex Williamson
2024-12-03 13:35 ` [PATCH v2 8/9] vfio/igd: emulate BDSM in mmio bar0 for gen 6-10 devices Tomita Moeko
2024-12-03 16:24   ` Corvin Köhne
2024-12-03 13:35 ` [PATCH v2 9/9] vfio/igd: add x-igd-gms option back to set DSM region size for guest Tomita Moeko
2024-12-03 16:30   ` Corvin Köhne
2024-12-04 22:35     ` Alex Williamson
2024-12-03 20:12 ` [PATCH v2 0/9] vfio/igd: Enable legacy mode on more devices Alex Williamson
2024-12-04 15:08   ` Tomita Moeko
2024-12-29 16:43     ` Tomita Moeko

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