[PULL 0/6] loongarch-to-apply queue

[PULL 0/6] loongarch-to-apply queue

[Song Gao]

The following changes since commit db2feb2df8d19592c9859efb3f682404e0052957:

  Merge tag 'pull-misc-20240605' of https://gitlab.com/rth7680/qemu into staging (2024-06-05 14:17:01 -0700)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240606

for you to fetch changes up to 78f932ea1f7b3b9b0ac628dc2a91281318fe51fa:

  target/loongarch: fix a wrong print in cpu dump (2024-06-06 11:58:06 +0800)

----------------------------------------------------------------
pull-loongarch-20240606

----------------------------------------------------------------
Bibo Mao (2):
      tests/libqos: Add loongarch virt machine node
      tests/qtest: Add numa test for loongarch system

Song Gao (3):
      hw/intc/loongarch_extioi: Add extioi virt extension definition
      hw/loongarch/virt: Use MemTxAttrs interface for misc ops
      hw/loongarch/virt: Enable extioi virt extension

lanyanzhi (1):
      target/loongarch: fix a wrong print in cpu dump

 hw/intc/loongarch_extioi.c                  |  88 ++++++++++++-
 hw/loongarch/virt.c                         | 184 +++++++++++++++++++++++-----
 include/hw/intc/loongarch_extioi.h          |  21 ++++
 include/hw/loongarch/virt.h                 |   1 +
 target/loongarch/cpu.c                      |   2 +-
 target/loongarch/cpu.h                      |   1 +
 tests/qtest/libqos/loongarch-virt-machine.c | 114 +++++++++++++++++
 tests/qtest/libqos/meson.build              |   1 +
 tests/qtest/meson.build                     |   2 +-
 tests/qtest/numa-test.c                     |  53 ++++++++
 10 files changed, 428 insertions(+), 39 deletions(-)
 create mode 100644 tests/qtest/libqos/loongarch-virt-machine.c

Re: [PULL 0/6] loongarch-to-apply queue

[Richard Henderson]

On 6/5/24 21:01, Song Gao wrote:
> The following changes since commit db2feb2df8d19592c9859efb3f682404e0052957:
> 
>    Merge tag 'pull-misc-20240605' ofhttps://gitlab.com/rth7680/qemu  into staging (2024-06-05 14:17:01 -0700)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/gaosong/qemu.git  tags/pull-loongarch-20240606
> 
> for you to fetch changes up to 78f932ea1f7b3b9b0ac628dc2a91281318fe51fa:
> 
>    target/loongarch: fix a wrong print in cpu dump (2024-06-06 11:58:06 +0800)
> 
> ----------------------------------------------------------------
> pull-loongarch-20240606

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/9.1 as appropriate.


r~

[PULL 0/6] loongarch-to-apply queue

[Song Gao]

The following changes since commit 6f625ce2f21d6a1243065d236298277c56f972d5:

  Merge tag 'pull-request-2024-10-21' of https://gitlab.com/thuth/qemu into staging (2024-10-21 17:12:59 +0100)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20241024

for you to fetch changes up to c44e0d6ba280dcc6bdf4ed555020c61d564b526c:

  target/loongarch: Add steal time support on migration (2024-10-24 17:27:55 +0800)

----------------------------------------------------------------
pull-loongarch-20241024

----------------------------------------------------------------
Bibo Mao (6):
      target/loongarch: Add loongson binary translation feature
      target/loongarch: Implement lbt registers save/restore function
      target/loongarch/kvm: Implement LoongArch PMU extension
      linux-headers: loongarch: Add kvm_para.h and unistd_64.h
      linux-headers: Update to Linux v6.12-rc3
      target/loongarch: Add steal time support on migration

 include/standard-headers/drm/drm_fourcc.h          |  43 +++
 include/standard-headers/linux/const.h             |  17 ++
 include/standard-headers/linux/ethtool.h           | 226 +++++++++++++++
 include/standard-headers/linux/fuse.h              |  22 +-
 include/standard-headers/linux/input-event-codes.h |   2 +
 include/standard-headers/linux/pci_regs.h          |  41 ++-
 include/standard-headers/linux/virtio_balloon.h    |  16 +-
 include/standard-headers/linux/virtio_gpu.h        |   1 +
 linux-headers/asm-arm64/mman.h                     |   9 +
 linux-headers/asm-arm64/unistd.h                   |  25 +-
 linux-headers/asm-generic/unistd.h                 |   6 +-
 linux-headers/asm-loongarch/kvm.h                  |  24 ++
 linux-headers/asm-loongarch/kvm_para.h             |  21 ++
 linux-headers/asm-loongarch/unistd.h               |   4 +-
 linux-headers/asm-loongarch/unistd_64.h            | 320 +++++++++++++++++++++
 linux-headers/asm-riscv/kvm.h                      |   7 +
 linux-headers/asm-riscv/unistd.h                   |  41 +--
 linux-headers/asm-x86/kvm.h                        |   2 +
 linux-headers/asm-x86/unistd_64.h                  |   1 +
 linux-headers/asm-x86/unistd_x32.h                 |   1 +
 linux-headers/linux/bits.h                         |   3 +
 linux-headers/linux/const.h                        |  17 ++
 linux-headers/linux/iommufd.h                      | 143 +++++++--
 linux-headers/linux/kvm.h                          |  23 +-
 linux-headers/linux/mman.h                         |   1 +
 linux-headers/linux/psp-sev.h                      |  28 ++
 scripts/update-linux-headers.sh                    |   4 +
 target/loongarch/cpu.c                             |  43 +++
 target/loongarch/cpu.h                             |  23 ++
 target/loongarch/kvm/kvm.c                         | 225 ++++++++++++++-
 target/loongarch/loongarch-qmp-cmds.c              |   2 +-
 target/loongarch/machine.c                         |  30 +-
 32 files changed, 1274 insertions(+), 97 deletions(-)
 create mode 100644 linux-headers/asm-loongarch/kvm_para.h
 create mode 100644 linux-headers/asm-loongarch/unistd_64.h

Re: [PULL 0/6] loongarch-to-apply queue

[Peter Maydell]

On Thu, 24 Oct 2024 at 10:44, Song Gao <gaosong@loongson.cn> wrote:
>
> The following changes since commit 6f625ce2f21d6a1243065d236298277c56f972d5:
>
>   Merge tag 'pull-request-2024-10-21' of https://gitlab.com/thuth/qemu into staging (2024-10-21 17:12:59 +0100)
>
> are available in the Git repository at:
>
>   https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20241024
>
> for you to fetch changes up to c44e0d6ba280dcc6bdf4ed555020c61d564b526c:
>
>   target/loongarch: Add steal time support on migration (2024-10-24 17:27:55 +0800)
>
> ----------------------------------------------------------------
> pull-loongarch-20241024
>
> ----------------------------------------------------------------
> Bibo Mao (6):
>       target/loongarch: Add loongson binary translation feature
>       target/loongarch: Implement lbt registers save/restore function
>       target/loongarch/kvm: Implement LoongArch PMU extension
>       linux-headers: loongarch: Add kvm_para.h and unistd_64.h
>       linux-headers: Update to Linux v6.12-rc3
>       target/loongarch: Add steal time support on migration

Hi; this fails to build on all the aarch64 jobs
(both normal and cross-compile):

https://gitlab.com/qemu-project/qemu/-/jobs/8190899599
https://gitlab.com/qemu-project/qemu/-/jobs/8190899331

In file included from /usr/include/aarch64-linux-gnu/sys/syscall.h:24,
from ../util/oslib-posix.c:48:
linux-headers/asm/unistd.h:2:10: fatal error: asm/unistd_64.h: No such
file or directory
2 | #include <asm/unistd_64.h>
  |          ^~~~~~~~~~~~~~~~~


thanks
-- PMM

Re: [PULL 0/6] loongarch-to-apply queue

[bibo mao]

Peter Maydell <peter.maydell@linaro.org> 于2024年10月26日周六 02:12写道：
>
> On Thu, 24 Oct 2024 at 10:44, Song Gao <gaosong@loongson.cn> wrote:
> >
> > The following changes since commit 6f625ce2f21d6a1243065d236298277c56f972d5:
> >
> >   Merge tag 'pull-request-2024-10-21' of https://gitlab.com/thuth/qemu into staging (2024-10-21 17:12:59 +0100)
> >
> > are available in the Git repository at:
> >
> >   https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20241024
> >
> > for you to fetch changes up to c44e0d6ba280dcc6bdf4ed555020c61d564b526c:
> >
> >   target/loongarch: Add steal time support on migration (2024-10-24 17:27:55 +0800)
> >
> > ----------------------------------------------------------------
> > pull-loongarch-20241024
> >
> > ----------------------------------------------------------------
> > Bibo Mao (6):
> >       target/loongarch: Add loongson binary translation feature
> >       target/loongarch: Implement lbt registers save/restore function
> >       target/loongarch/kvm: Implement LoongArch PMU extension
> >       linux-headers: loongarch: Add kvm_para.h and unistd_64.h
> >       linux-headers: Update to Linux v6.12-rc3
> >       target/loongarch: Add steal time support on migration
>
> Hi; this fails to build on all the aarch64 jobs
> (both normal and cross-compile):
>
> https://gitlab.com/qemu-project/qemu/-/jobs/8190899599
> https://gitlab.com/qemu-project/qemu/-/jobs/8190899331
>
> In file included from /usr/include/aarch64-linux-gnu/sys/syscall.h:24,
> from ../util/oslib-posix.c:48:
> linux-headers/asm/unistd.h:2:10: fatal error: asm/unistd_64.h: No such
> file or directory
> 2 | #include <asm/unistd_64.h>
>   |          ^~~~~~~~~~~~~~~~~

OOPS, there is missing file about unistd_64.h on ARM64 besides LoongArch64 also.
Will check and verify on all architectures.

Regards
Bibo Mao
>
>
> thanks
> -- PMM
>

[PULL 0/6] loongarch-to-apply queue

[Bibo Mao]

The following changes since commit aa3a285b5bc56a4208b3b57d4a55291e9c260107:

  Merge tag 'mem-2024-12-21' of https://github.com/davidhildenbrand/qemu into staging (2024-12-22 14:33:27 -0500)

are available in the Git repository at:

  https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241225

for you to fetch changes up to cb91b7108cb0b3781de9a00994fe78b631d80012:

  target/loongarch: Use auto method with LASX feature (2024-12-25 10:33:20 +0800)

----------------------------------------------------------------
pull-loongarch-20241225

----------------------------------------------------------------
Bibo Mao (5):
      target/loongarch: Use actual operand size with vbsrl check
      hw/loongarch/virt: Create fdt table on machine creation done notification
      hw/loongarch/virt: Improve fdt table creation for CPU object
      target/loongarch: Use auto method with LSX feature
      target/loongarch: Use auto method with LASX feature

ghy (1):
      target/loongarch: Fix vldi inst

 hw/loongarch/virt.c                             | 142 ++++++++++++++----------
 target/loongarch/cpu.c                          |  86 ++++++++------
 target/loongarch/cpu.h                          |   4 +
 target/loongarch/kvm/kvm.c                      | 107 ++++++++++++++++++
 target/loongarch/tcg/insn_trans/trans_vec.c.inc |   4 +-
 5 files changed, 249 insertions(+), 94 deletions(-)

[PULL 0/6] loongarch-to-apply queue

[Bibo Mao]

The following changes since commit 3f8bcbba3b320c610689576fc47595f1076198dd:

  Merge tag 'pull-request-2025-01-08' of https://gitlab.com/thuth/qemu into staging (2025-01-08 11:38:21 -0500)

are available in the Git repository at:

  https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20250109

for you to fetch changes up to c3afa714bcea4c8b014fec99881bd0bdbe8262b8:

  hw/intc/loongarch_extioi: Add irq routing support from physical id (2025-01-09 14:13:41 +0800)

----------------------------------------------------------------
pull-loongarch-20250109

----------------------------------------------------------------
Bibo Mao (4):
      target/loongarch: Only support 64bit pte width
      hw/intc/loongarch_extioi: Get cpu number from possible_cpu_arch_ids
      hw/intc/loongarch_extioi: Remove num-cpu property
      hw/intc/loongarch_extioi: Add irq routing support from physical id

Jiaxun Yang (2):
      hw/core/loader: Use ssize_t for efi zboot unpacker
      hw/loongarch/boot: Support Linux raw boot image

 hw/arm/boot.c                                      |  2 +-
 hw/core/loader.c                                   |  4 +-
 hw/intc/loongarch_extioi.c                         | 36 +++++++----
 hw/intc/loongarch_extioi_common.c                  | 18 +++++-
 hw/loongarch/boot.c                                | 69 ++++++++++++++++++++++
 hw/loongarch/virt.c                                |  1 -
 include/hw/intc/loongarch_extioi_common.h          |  2 +
 include/hw/loader.h                                |  2 +-
 target/loongarch/helper.h                          |  1 +
 target/loongarch/tcg/csr_helper.c                  | 21 +++++++
 .../tcg/insn_trans/trans_privileged.c.inc          |  2 +-
 target/loongarch/tcg/tlb_helper.c                  | 17 +-----
 12 files changed, 142 insertions(+), 33 deletions(-)

[PULL 1/6] hw/core/loader: Use ssize_t for efi zboot unpacker

[Bibo Mao]

From: Jiaxun Yang <jiaxun.yang@flygoat.com>

Convert to use sszie_t to represent size internally to avoid
large image overflowing the size.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/arm/boot.c       | 2 +-
 hw/core/loader.c    | 4 ++--
 include/hw/loader.h | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 68fe8654e6..b44bea8a82 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -857,7 +857,7 @@ static uint64_t load_aarch64_image(const char *filename, hwaddr mem_base,
     hwaddr kernel_load_offset = KERNEL64_LOAD_ADDR;
     uint64_t kernel_size = 0;
     uint8_t *buffer;
-    int size;
+    ssize_t size;
 
     /* On aarch64, it's the bootloader's job to uncompress the kernel. */
     size = load_image_gzipped_buffer(filename, LOAD_IMAGE_MAX_GUNZIP_BYTES,
diff --git a/hw/core/loader.c b/hw/core/loader.c
index c0407e2d0d..4dfdb027ee 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -886,11 +886,11 @@ struct linux_efi_zboot_header {
  *
  * If the image is not a Linux EFI zboot image, do nothing and return success.
  */
-ssize_t unpack_efi_zboot_image(uint8_t **buffer, int *size)
+ssize_t unpack_efi_zboot_image(uint8_t **buffer, ssize_t *size)
 {
     const struct linux_efi_zboot_header *header;
     uint8_t *data = NULL;
-    int ploff, plsize;
+    ssize_t ploff, plsize;
     ssize_t bytes;
 
     /* ignore if this is too small to be a EFI zboot image */
diff --git a/include/hw/loader.h b/include/hw/loader.h
index 7f6d06b956..8985046be4 100644
--- a/include/hw/loader.h
+++ b/include/hw/loader.h
@@ -101,7 +101,7 @@ ssize_t load_image_gzipped_buffer(const char *filename, uint64_t max_sz,
  * Returns the size of the decompressed payload if decompression was performed
  * successfully.
  */
-ssize_t unpack_efi_zboot_image(uint8_t **buffer, int *size);
+ssize_t unpack_efi_zboot_image(uint8_t **buffer, ssize_t *size);
 
 #define ELF_LOAD_FAILED       -1
 #define ELF_LOAD_NOT_ELF      -2
-- 
2.43.5

[PULL 2/6] hw/loongarch/boot: Support Linux raw boot image

[Bibo Mao]

From: Jiaxun Yang <jiaxun.yang@flygoat.com>

Support booting such image by parsing header as per Linux's
specification [1].

This enabled booting vmlinux.efi/vmlinuz.efi shipped by
distros without supplying BIOS.

[1]: https://docs.kernel.org/arch/loongarch/booting.html

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/loongarch/boot.c | 69 +++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 69 insertions(+)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index 48154cdce6..241c0eef1f 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -15,6 +15,26 @@
 #include "system/reset.h"
 #include "system/qtest.h"
 
+/*
+ * Linux Image Format
+ * https://docs.kernel.org/arch/loongarch/booting.html
+ */
+#define LINUX_PE_MAGIC  0x818223cd
+#define MZ_MAGIC        0x5a4d /* "MZ" */
+
+struct loongarch_linux_hdr {
+    uint32_t mz_magic;
+    uint32_t res0;
+    uint64_t kernel_entry;
+    uint64_t kernel_size;
+    uint64_t load_offset;
+    uint64_t res1;
+    uint64_t res2;
+    uint64_t res3;
+    uint32_t linux_pe_magic;
+    uint32_t pe_header_offset;
+} QEMU_PACKED;
+
 struct memmap_entry *memmap_table;
 unsigned memmap_entries;
 
@@ -171,6 +191,50 @@ static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
     return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
 }
 
+static int64_t load_loongarch_linux_image(const char *filename,
+                                          uint64_t *kernel_entry,
+                                          uint64_t *kernel_low,
+                                          uint64_t *kernel_high)
+{
+    gsize len;
+    ssize_t size;
+    uint8_t *buffer;
+    struct loongarch_linux_hdr *hdr;
+
+    /* Load as raw file otherwise */
+    if (!g_file_get_contents(filename, (char **)&buffer, &len, NULL)) {
+        return -1;
+    }
+    size = len;
+
+    /* Unpack the image if it is a EFI zboot image */
+    if (unpack_efi_zboot_image(&buffer, &size) < 0) {
+        g_free(buffer);
+        return -1;
+    }
+
+    hdr = (struct loongarch_linux_hdr *)buffer;
+
+    if (extract32(le32_to_cpu(hdr->mz_magic), 0, 16) != MZ_MAGIC ||
+        le32_to_cpu(hdr->linux_pe_magic) != LINUX_PE_MAGIC) {
+        g_free(buffer);
+        return -1;
+    }
+
+    /* Early kernel versions may have those fields in virtual address */
+    *kernel_entry = extract64(le64_to_cpu(hdr->kernel_entry),
+                              0, TARGET_PHYS_ADDR_SPACE_BITS);
+    *kernel_low = extract64(le64_to_cpu(hdr->load_offset),
+                            0, TARGET_PHYS_ADDR_SPACE_BITS);
+    *kernel_high = *kernel_low + size;
+
+    rom_add_blob_fixed(filename, buffer, size, *kernel_low);
+
+    g_free(buffer);
+
+    return size;
+}
+
 static int64_t load_kernel_info(struct loongarch_boot_info *info)
 {
     uint64_t kernel_entry, kernel_low, kernel_high;
@@ -181,6 +245,11 @@ static int64_t load_kernel_info(struct loongarch_boot_info *info)
                            &kernel_entry, &kernel_low,
                            &kernel_high, NULL, 0,
                            EM_LOONGARCH, 1, 0);
+    if (kernel_size < 0) {
+        kernel_size = load_loongarch_linux_image(info->kernel_filename,
+                                                 &kernel_entry, &kernel_low,
+                                                 &kernel_high);
+    }
 
     if (kernel_size < 0) {
         error_report("could not load kernel '%s': %s",
-- 
2.43.5

[PULL 3/6] target/loongarch: Only support 64bit pte width

[Bibo Mao]

iFrom LoongArch Reference Manual pte width can be 64bit, 128bit
or more. Instead real hardware only supports 64bit pte width.
For 12bit pte, there is no detail definition for all 128bit
from manual.

Here only 64bit pte width is supported for simplicity, will add
this in later if real hw support it and there is definition for
all the bits from manual.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/helper.h                     |  1 +
 target/loongarch/tcg/csr_helper.c             | 21 +++++++++++++++++++
 .../tcg/insn_trans/trans_privileged.c.inc     |  2 +-
 target/loongarch/tcg/tlb_helper.c             | 17 +++------------
 4 files changed, 26 insertions(+), 15 deletions(-)

diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
index b3b64a0215..943517b5f2 100644
--- a/target/loongarch/helper.h
+++ b/target/loongarch/helper.h
@@ -104,6 +104,7 @@ DEF_HELPER_2(csrwr_estat, i64, env, tl)
 DEF_HELPER_2(csrwr_asid, i64, env, tl)
 DEF_HELPER_2(csrwr_tcfg, i64, env, tl)
 DEF_HELPER_2(csrwr_ticlr, i64, env, tl)
+DEF_HELPER_2(csrwr_pwcl, i64, env, tl)
 DEF_HELPER_2(iocsrrd_b, i64, env, tl)
 DEF_HELPER_2(iocsrrd_h, i64, env, tl)
 DEF_HELPER_2(iocsrrd_w, i64, env, tl)
diff --git a/target/loongarch/tcg/csr_helper.c b/target/loongarch/tcg/csr_helper.c
index 15f94caefa..6c95be9910 100644
--- a/target/loongarch/tcg/csr_helper.c
+++ b/target/loongarch/tcg/csr_helper.c
@@ -6,6 +6,7 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/log.h"
 #include "qemu/main-loop.h"
 #include "cpu.h"
 #include "internals.h"
@@ -95,3 +96,23 @@ target_ulong helper_csrwr_ticlr(CPULoongArchState *env, target_ulong val)
     }
     return old_v;
 }
+
+target_ulong helper_csrwr_pwcl(CPULoongArchState *env, target_ulong val)
+{
+    int shift;
+    int64_t old_v = env->CSR_PWCL;
+
+    /*
+     * The real hardware only supports 64bit PTE width now, 128bit or others
+     * treated as illegal.
+     */
+    shift = FIELD_EX64(val, CSR_PWCL, PTEWIDTH);
+    if (shift) {
+        qemu_log_mask(LOG_GUEST_ERROR,
+                      "Attempted set pte width with %d bit\n", 64 << shift);
+        val = FIELD_DP64(val, CSR_PWCL, PTEWIDTH, 0);
+    }
+
+    env->CSR_PWCL = val;
+    return old_v;
+}
diff --git a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
index 7e4ec93edb..30f9b83fb2 100644
--- a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc
@@ -95,7 +95,7 @@ static const CSRInfo csr_info[] = {
     CSR_OFF(PGDL),
     CSR_OFF(PGDH),
     CSR_OFF_FUNCS(PGD, CSRFL_READONLY, gen_helper_csrrd_pgd, NULL),
-    CSR_OFF(PWCL),
+    CSR_OFF_FUNCS(PWCL, 0, NULL, gen_helper_csrwr_pwcl),
     CSR_OFF(PWCH),
     CSR_OFF(STLBPS),
     CSR_OFF(RVACFG),
diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_helper.c
index 97f38fc391..8c61fe728c 100644
--- a/target/loongarch/tcg/tlb_helper.c
+++ b/target/loongarch/tcg/tlb_helper.c
@@ -512,7 +512,6 @@ target_ulong helper_lddir(CPULoongArchState *env, target_ulong base,
 {
     CPUState *cs = env_cpu(env);
     target_ulong badvaddr, index, phys, ret;
-    int shift;
     uint64_t dir_base, dir_width;
 
     if (unlikely((level == 0) || (level > 4))) {
@@ -537,14 +536,9 @@ target_ulong helper_lddir(CPULoongArchState *env, target_ulong base,
 
     badvaddr = env->CSR_TLBRBADV;
     base = base & TARGET_PHYS_MASK;
-
-    /* 0:64bit, 1:128bit, 2:192bit, 3:256bit */
-    shift = FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTEWIDTH);
-    shift = (shift + 1) * 3;
-
     get_dir_base_width(env, &dir_base, &dir_width, level);
     index = (badvaddr >> dir_base) & ((1 << dir_width) - 1);
-    phys = base | index << shift;
+    phys = base | index << 3;
     ret = ldq_phys(cs->as, phys) & TARGET_PHYS_MASK;
     return ret;
 }
@@ -554,7 +548,6 @@ void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
 {
     CPUState *cs = env_cpu(env);
     target_ulong phys, tmp0, ptindex, ptoffset0, ptoffset1, ps, badv;
-    int shift;
     uint64_t ptbase = FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTBASE);
     uint64_t ptwidth = FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTWIDTH);
     uint64_t dir_base, dir_width;
@@ -595,16 +588,12 @@ void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
             tmp0 += MAKE_64BIT_MASK(ps, 1);
         }
     } else {
-        /* 0:64bit, 1:128bit, 2:192bit, 3:256bit */
-        shift = FIELD_EX64(env->CSR_PWCL, CSR_PWCL, PTEWIDTH);
-        shift = (shift + 1) * 3;
         badv = env->CSR_TLBRBADV;
 
         ptindex = (badv >> ptbase) & ((1 << ptwidth) - 1);
         ptindex = ptindex & ~0x1;   /* clear bit 0 */
-        ptoffset0 = ptindex << shift;
-        ptoffset1 = (ptindex + 1) << shift;
-
+        ptoffset0 = ptindex << 3;
+        ptoffset1 = (ptindex + 1) << 3;
         phys = base | (odd ? ptoffset1 : ptoffset0);
         tmp0 = ldq_phys(cs->as, phys) & TARGET_PHYS_MASK;
         ps = ptbase;
-- 
2.43.5

[PULL 4/6] hw/intc/loongarch_extioi: Get cpu number from possible_cpu_arch_ids

[Bibo Mao]

Supported CPU number can be acquired from function
possible_cpu_arch_ids(), cpu-num property is not necessary.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/intc/loongarch_extioi.c                |  6 ------
 hw/intc/loongarch_extioi_common.c         | 17 +++++++++++++++--
 include/hw/intc/loongarch_extioi_common.h |  2 ++
 3 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
index 4a1a7c357c..d18f47def7 100644
--- a/hw/intc/loongarch_extioi.c
+++ b/hw/intc/loongarch_extioi.c
@@ -347,12 +347,6 @@ static void loongarch_extioi_realize(DeviceState *dev, Error **errp)
         s->status |= BIT(EXTIOI_ENABLE);
     }
 
-    s->cpu = g_new0(ExtIOICore, s->num_cpu);
-    if (s->cpu == NULL) {
-        error_setg(errp, "Memory allocation for ExtIOICore faile");
-        return;
-    }
-
     for (i = 0; i < s->num_cpu; i++) {
         for (pin = 0; pin < LS3A_INTC_IP; pin++) {
             qdev_init_gpio_out(dev, &s->cpu[i].parent_irq[pin], 1);
diff --git a/hw/intc/loongarch_extioi_common.c b/hw/intc/loongarch_extioi_common.c
index e4c1cc3c98..99a091e30b 100644
--- a/hw/intc/loongarch_extioi_common.c
+++ b/hw/intc/loongarch_extioi_common.c
@@ -13,11 +13,24 @@
 static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp)
 {
     LoongArchExtIOICommonState *s = (LoongArchExtIOICommonState *)dev;
+    MachineState *machine = MACHINE(qdev_get_machine());
+    MachineClass *mc = MACHINE_GET_CLASS(machine);
+    const CPUArchIdList *id_list;
+    int i;
 
-    if (s->num_cpu == 0) {
-        error_setg(errp, "num-cpu must be at least 1");
+    assert(mc->possible_cpu_arch_ids);
+    id_list = mc->possible_cpu_arch_ids(machine);
+    s->num_cpu = id_list->len;
+    s->cpu = g_new0(ExtIOICore, s->num_cpu);
+    if (s->cpu == NULL) {
+        error_setg(errp, "Memory allocation for ExtIOICore faile");
         return;
     }
+
+    for (i = 0; i < s->num_cpu; i++) {
+        s->cpu[i].arch_id = id_list->cpus[i].arch_id;
+        s->cpu[i].cpu = CPU(id_list->cpus[i].cpu);
+    }
 }
 
 static int loongarch_extioi_common_pre_save(void *opaque)
diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
index f6bc778a85..22d7880977 100644
--- a/include/hw/intc/loongarch_extioi_common.h
+++ b/include/hw/intc/loongarch_extioi_common.h
@@ -65,6 +65,8 @@ typedef struct ExtIOICore {
     uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
     DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
     qemu_irq parent_irq[LS3A_INTC_IP];
+    uint64_t arch_id;
+    CPUState *cpu;
 } ExtIOICore;
 
 struct LoongArchExtIOICommonState {
-- 
2.43.5

[PULL 5/6] hw/intc/loongarch_extioi: Remove num-cpu property

[Bibo Mao]

Since cpu number can be acquired from possible_cpu_arch_ids(),
num-cpu property is not necessary. Here remove num-cpu property
for object TYPE_LOONGARCH_EXTIOI_COMMON object.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/intc/loongarch_extioi_common.c | 1 -
 hw/loongarch/virt.c               | 1 -
 2 files changed, 2 deletions(-)

diff --git a/hw/intc/loongarch_extioi_common.c b/hw/intc/loongarch_extioi_common.c
index 99a091e30b..fd56253d10 100644
--- a/hw/intc/loongarch_extioi_common.c
+++ b/hw/intc/loongarch_extioi_common.c
@@ -95,7 +95,6 @@ static const VMStateDescription vmstate_loongarch_extioi = {
 };
 
 static const Property extioi_properties[] = {
-    DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1),
     DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState,
                     features, EXTIOI_HAS_VIRT_EXTENSION, 0),
 };
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 60bd4dc9d3..df56d75a6e 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -921,7 +921,6 @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
 
     /* Create EXTIOI device */
     extioi = qdev_new(TYPE_LOONGARCH_EXTIOI);
-    qdev_prop_set_uint32(extioi, "num-cpu", ms->smp.cpus);
     if (virt_is_veiointc_enabled(lvms)) {
         qdev_prop_set_bit(extioi, "has-virtualization-extension", true);
     }
-- 
2.43.5

[PULL 6/6] hw/intc/loongarch_extioi: Add irq routing support from physical id

[Bibo Mao]

The simliar with IPI interrupt controller, physical cpu id is used
for irq routing for extioi interrupt controller.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/intc/loongarch_extioi.c | 30 ++++++++++++++++++++++++++----
 1 file changed, 26 insertions(+), 4 deletions(-)

diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
index d18f47def7..f3055ec4d2 100644
--- a/hw/intc/loongarch_extioi.c
+++ b/hw/intc/loongarch_extioi.c
@@ -15,6 +15,23 @@
 #include "hw/intc/loongarch_extioi.h"
 #include "trace.h"
 
+static int extioi_get_index_from_archid(LoongArchExtIOICommonState *s,
+                                        uint64_t arch_id)
+{
+    int i;
+
+    for (i = 0; i < s->num_cpu; i++) {
+        if (s->cpu[i].arch_id == arch_id) {
+            break;
+        }
+    }
+
+    if ((i < s->num_cpu) && s->cpu[i].cpu) {
+        return i;
+    }
+
+    return -1;
+}
 
 static void extioi_update_irq(LoongArchExtIOICommonState *s, int irq, int level)
 {
@@ -125,7 +142,7 @@ static inline void extioi_enable_irq(LoongArchExtIOICommonState *s, int index,\
 static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s,
                                             int irq, uint64_t val, bool notify)
 {
-    int i, cpu;
+    int i, cpu, cpuid;
 
     /*
      * loongarch only support little endian,
@@ -134,12 +151,17 @@ static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s,
     val = cpu_to_le64(val);
 
     for (i = 0; i < 4; i++) {
-        cpu = val & 0xff;
+        cpuid = val & 0xff;
         val = val >> 8;
 
         if (!(s->status & BIT(EXTIOI_ENABLE_CPU_ENCODE))) {
-            cpu = ctz32(cpu);
-            cpu = (cpu >= 4) ? 0 : cpu;
+            cpuid = ctz32(cpuid);
+            cpuid = (cpuid >= 4) ? 0 : cpuid;
+        }
+
+        cpu = extioi_get_index_from_archid(s, cpuid);
+        if (cpu < 0) {
+            continue;
         }
 
         if (s->sw_coremap[irq + i] == cpu) {
-- 
2.43.5

Re: [PULL 0/6] loongarch-to-apply queue

[Stefan Hajnoczi]

[-- Attachment #1: Type: text/plain, Size: 116 bytes --]

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

[PULL 0/6] loongarch-to-apply queue

[Bibo Mao]

The following changes since commit ffaf7f0376f8040ce9068d71ae9ae8722505c42e:

  Merge tag 'pull-10.0-testing-and-gdstub-updates-100225-1' of https://gitlab.com/stsquad/qemu into staging (2025-02-10 13:26:17 -0500)

are available in the Git repository at:

  https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20250212

for you to fetch changes up to 456739ce4347c21b6fa2ec1b6585bc4a6504446f:

  hw/loongarch/virt: CPU irq line connection improvement (2025-02-12 10:05:22 +0800)

----------------------------------------------------------------
pull-loongarch-20250212 queue

----------------------------------------------------------------
Bibo Mao (6):
      hw/loongarch/virt: Rename filename acpi-build with virt-acpi-build
      hw/loongarch/virt: Rename function prefix name
      hw/loongarch/virt: Add separate file for fdt building
      hw/loongarch/virt: Set iocsr address space when CPU is created
      hw/loongarch/virt: Remove unused ipistate
      hw/loongarch/virt: CPU irq line connection improvement

 hw/loongarch/meson.build                         |   6 +-
 hw/loongarch/{acpi-build.c => virt-acpi-build.c} |   6 +-
 hw/loongarch/virt-fdt-build.c                    | 535 ++++++++++++++++++++
 hw/loongarch/virt.c                              | 593 ++---------------------
 include/hw/loongarch/virt.h                      |   5 +-
 target/loongarch/cpu.h                           |   2 -
 6 files changed, 584 insertions(+), 563 deletions(-)
 rename hw/loongarch/{acpi-build.c => virt-acpi-build.c} (99%)
 create mode 100644 hw/loongarch/virt-fdt-build.c

Re: [PULL 0/6] loongarch-to-apply queue

[Stefan Hajnoczi]

[-- Attachment #1: Type: text/plain, Size: 116 bytes --]

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

[PULL 0/6] loongarch-to-apply queue

[Song Gao]

The following changes since commit 37ad0e48e9fd58b170abbf31c18a994346f62ed7:

  Merge tag 'pull-10.2-maintainer-071025-1' of https://gitlab.com/stsquad/qemu into staging (2025-10-07 08:46:28 -0700)

are available in the Git repository at:

  https://github.com/gaosong715/qemu.git tags/pull-loongarch-20251009

for you to fetch changes up to fa6af7f6bf6dbc4c83595905d2572ad86358aa67:

  target/loongarch: Define loongarch_exception_name() as static (2025-10-09 19:11:37 +0800)

----------------------------------------------------------------
pull-loongarch-20251009

----------------------------------------------------------------
Bibo Mao (3):
      target/loongarch: Move TCG specified functions to tcg_cpu.c
      target/loongarch: Move function do_raise_exception() to tcg_cpu.c
      target/loongarch: Define loongarch_exception_name() as static

Huacai Chen (3):
      bios-tables-test-allowed-diff.h: Allow LoongArch DSDT.*
      hw/loongarch/virt: Align VIRT_GED_CPUHP_ADDR to 4 bytes
      tests/data/acpi/loongarch64: Update expected DSDT.*

 include/hw/loongarch/virt.h                    |   6 +-
 target/loongarch/cpu.c                         | 318 +-----------------------
 target/loongarch/internals.h                   |   4 +-
 target/loongarch/tcg/meson.build               |   1 +
 target/loongarch/tcg/tcg_cpu.c                 | 322 +++++++++++++++++++++++++
 target/loongarch/tcg/tcg_loongarch.h           |   1 +
 tests/data/acpi/loongarch64/virt/DSDT          | Bin 4603 -> 4603 bytes
 tests/data/acpi/loongarch64/virt/DSDT.memhp    | Bin 5824 -> 5824 bytes
 tests/data/acpi/loongarch64/virt/DSDT.numamem  | Bin 4609 -> 4609 bytes
 tests/data/acpi/loongarch64/virt/DSDT.topology | Bin 4905 -> 4905 bytes
 10 files changed, 331 insertions(+), 321 deletions(-)
 create mode 100644 target/loongarch/tcg/tcg_cpu.c

Re: [PULL 0/6] loongarch-to-apply queue

[Richard Henderson]

On 10/9/25 05:35, Song Gao wrote:
> The following changes since commit 37ad0e48e9fd58b170abbf31c18a994346f62ed7:
> 
>    Merge tag 'pull-10.2-maintainer-071025-1' ofhttps://gitlab.com/stsquad/qemu into staging (2025-10-07 08:46:28 -0700)
> 
> are available in the Git repository at:
> 
>    https://github.com/gaosong715/qemu.git tags/pull-loongarch-20251009
> 
> for you to fetch changes up to fa6af7f6bf6dbc4c83595905d2572ad86358aa67:
> 
>    target/loongarch: Define loongarch_exception_name() as static (2025-10-09 19:11:37 +0800)
> 
> ----------------------------------------------------------------
> pull-loongarch-20251009


Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.

r~