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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Hervé Poussineau" <hpoussin@reactos.org>,
	"Aleksandar Rikalo" <arikalo@gmail.com>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Bernhard Beschow" <shentey@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Huacai Chen" <chenhuacai@kernel.org>,
	"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH 5/6] target/mips: Move CPU timer from hw/mips/ to target/mips/system/
Date: Tue, 21 Jan 2025 17:18:16 +0100	[thread overview]
Message-ID: <20250121161817.33654-6-philmd@linaro.org> (raw)
In-Reply-To: <20250121161817.33654-1-philmd@linaro.org>

MIPS CPU timer is tied to the CPU, no point of modelling it as
a general timer device. Move mips_int.c to target/mips/system/.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/mips/mips_int.c => target/mips/system/interrupts.c | 0
 hw/mips/meson.build                                   | 2 +-
 target/mips/system/meson.build                        | 1 +
 3 files changed, 2 insertions(+), 1 deletion(-)
 rename hw/mips/mips_int.c => target/mips/system/interrupts.c (100%)

diff --git a/hw/mips/mips_int.c b/target/mips/system/interrupts.c
similarity index 100%
rename from hw/mips/mips_int.c
rename to target/mips/system/interrupts.c
diff --git a/hw/mips/meson.build b/hw/mips/meson.build
index fcbee53bb32..6dd97331ca7 100644
--- a/hw/mips/meson.build
+++ b/hw/mips/meson.build
@@ -1,5 +1,5 @@
 mips_ss = ss.source_set()
-mips_ss.add(files('bootloader.c', 'mips_int.c'))
+mips_ss.add(files('bootloader.c'))
 common_ss.add(when: 'CONFIG_FW_CFG_MIPS', if_true: files('fw_cfg.c'))
 mips_ss.add(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_bootp.c', 'loongson3_virt.c'))
 mips_ss.add(when: 'CONFIG_MALTA', if_true: files('malta.c'))
diff --git a/target/mips/system/meson.build b/target/mips/system/meson.build
index 498cf289d6f..cf232c9edad 100644
--- a/target/mips/system/meson.build
+++ b/target/mips/system/meson.build
@@ -2,6 +2,7 @@ mips_system_ss.add(files(
   'addr.c',
   'cp0.c',
   'cp0_timer.c',
+  'interrupts.c',
   'machine.c',
   'mips-qmp-cmds.c',
   'physaddr.c',
-- 
2.47.1



  parent reply	other threads:[~2025-01-21 16:19 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-21 16:18 [PATCH 0/6] target/mips: Convert legacy qemu_allocate_irqs() to qemu_init_irq() Philippe Mathieu-Daudé
2025-01-21 16:18 ` [PATCH 1/6] hw/pci-host/bonito: Expose output IRQ as QDev GPIO Philippe Mathieu-Daudé
2025-01-21 16:18 ` [PATCH 2/6] target/mips: Create clock *after* accelerator vCPU is realized Philippe Mathieu-Daudé
2025-01-21 16:18 ` [PATCH 3/6] target/mips: Initialize CPU-specific timer/IRQs once in DeviceRealize Philippe Mathieu-Daudé
2025-01-21 23:07   ` Richard Henderson
2025-01-21 16:18 ` [PATCH 4/6] target/mips: Pass env to cpu_mips_clock_init() Philippe Mathieu-Daudé
2025-01-21 16:18 ` Philippe Mathieu-Daudé [this message]
2025-01-21 23:08   ` [PATCH 5/6] target/mips: Move CPU timer from hw/mips/ to target/mips/system/ Richard Henderson
2025-01-21 16:18 ` [PATCH 6/6] target/mips: Allocate CPU IRQs within CPUMIPSState Philippe Mathieu-Daudé
2025-01-21 16:20   ` Philippe Mathieu-Daudé
2025-01-21 23:12   ` Richard Henderson
2025-01-21 16:42 ` [PATCH 0/6] target/mips: Convert legacy qemu_allocate_irqs() to qemu_init_irq() Philippe Mathieu-Daudé

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