From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL 33/36] hw/sd/omap_mmc: Untabify
Date: Fri, 31 Jan 2025 22:05:16 +0100 [thread overview]
Message-ID: <20250131210520.85874-34-philmd@linaro.org> (raw)
In-Reply-To: <20250131210520.85874-1-philmd@linaro.org>
From: Peter Maydell <peter.maydell@linaro.org>
This is a very old source file, and still has some lingering
hard-coded tabs; untabify it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250128104519.3981448-9-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/sd/omap_mmc.c | 124 +++++++++++++++++++++++------------------------
1 file changed, 62 insertions(+), 62 deletions(-)
diff --git a/hw/sd/omap_mmc.c b/hw/sd/omap_mmc.c
index 18016a2f2e2..bbe7b971bbe 100644
--- a/hw/sd/omap_mmc.c
+++ b/hw/sd/omap_mmc.c
@@ -109,11 +109,11 @@ static void omap_mmc_fifolevel_update(OMAPMMCState *host)
/* These must match the encoding of the MMC_CMD Response field */
typedef enum {
- sd_nore = 0, /* no response */
- sd_r1, /* normal response command */
- sd_r2, /* CID, CSD registers */
- sd_r3, /* OCR register */
- sd_r6 = 6, /* Published RCA response */
+ sd_nore = 0, /* no response */
+ sd_r1, /* normal response command */
+ sd_r2, /* CID, CSD registers */
+ sd_r3, /* OCR register */
+ sd_r6 = 6, /* Published RCA response */
sd_r1b = -1,
} sd_rsp_type_t;
@@ -229,7 +229,7 @@ static void omap_mmc_command(OMAPMMCState *host, int cmd, int dir,
if (timeout)
host->status |= 0x0080;
else if (cmd == 12)
- host->status |= 0x0005; /* Makes it more real */
+ host->status |= 0x0005; /* Makes it more real */
else
host->status |= 0x0001;
}
@@ -338,32 +338,32 @@ static uint64_t omap_mmc_read(void *opaque, hwaddr offset, unsigned size)
}
switch (offset) {
- case 0x00: /* MMC_CMD */
+ case 0x00: /* MMC_CMD */
return s->last_cmd;
- case 0x04: /* MMC_ARGL */
+ case 0x04: /* MMC_ARGL */
return s->arg & 0x0000ffff;
- case 0x08: /* MMC_ARGH */
+ case 0x08: /* MMC_ARGH */
return s->arg >> 16;
- case 0x0c: /* MMC_CON */
+ case 0x0c: /* MMC_CON */
return (s->dw << 15) | (s->mode << 12) | (s->enable << 11) |
(s->be << 10) | s->clkdiv;
- case 0x10: /* MMC_STAT */
+ case 0x10: /* MMC_STAT */
return s->status;
- case 0x14: /* MMC_IE */
+ case 0x14: /* MMC_IE */
return s->mask;
- case 0x18: /* MMC_CTO */
+ case 0x18: /* MMC_CTO */
return s->cto;
- case 0x1c: /* MMC_DTO */
+ case 0x1c: /* MMC_DTO */
return s->dto;
- case 0x20: /* MMC_DATA */
+ case 0x20: /* MMC_DATA */
/* TODO: support 8-bit access */
i = s->fifo[s->fifo_start];
if (s->fifo_len == 0) {
@@ -378,42 +378,42 @@ static uint64_t omap_mmc_read(void *opaque, hwaddr offset, unsigned size)
omap_mmc_interrupts_update(s);
return i;
- case 0x24: /* MMC_BLEN */
+ case 0x24: /* MMC_BLEN */
return s->blen_counter;
- case 0x28: /* MMC_NBLK */
+ case 0x28: /* MMC_NBLK */
return s->nblk_counter;
- case 0x2c: /* MMC_BUF */
+ case 0x2c: /* MMC_BUF */
return (s->rx_dma << 15) | (s->af_level << 8) |
(s->tx_dma << 7) | s->ae_level;
- case 0x30: /* MMC_SPI */
+ case 0x30: /* MMC_SPI */
return 0x0000;
- case 0x34: /* MMC_SDIO */
+ case 0x34: /* MMC_SDIO */
return (s->cdet_wakeup << 2) | (s->cdet_enable) | s->sdio;
- case 0x38: /* MMC_SYST */
+ case 0x38: /* MMC_SYST */
return 0x0000;
- case 0x3c: /* MMC_REV */
+ case 0x3c: /* MMC_REV */
return s->rev;
- case 0x40: /* MMC_RSP0 */
- case 0x44: /* MMC_RSP1 */
- case 0x48: /* MMC_RSP2 */
- case 0x4c: /* MMC_RSP3 */
- case 0x50: /* MMC_RSP4 */
- case 0x54: /* MMC_RSP5 */
- case 0x58: /* MMC_RSP6 */
- case 0x5c: /* MMC_RSP7 */
+ case 0x40: /* MMC_RSP0 */
+ case 0x44: /* MMC_RSP1 */
+ case 0x48: /* MMC_RSP2 */
+ case 0x4c: /* MMC_RSP3 */
+ case 0x50: /* MMC_RSP4 */
+ case 0x54: /* MMC_RSP5 */
+ case 0x58: /* MMC_RSP6 */
+ case 0x5c: /* MMC_RSP7 */
return s->rsp[(offset - 0x40) >> 2];
/* OMAP2-specific */
- case 0x60: /* MMC_IOSR */
- case 0x64: /* MMC_SYSC */
+ case 0x60: /* MMC_IOSR */
+ case 0x64: /* MMC_SYSC */
return 0;
- case 0x68: /* MMC_SYSS */
- return 1; /* RSTD */
+ case 0x68: /* MMC_SYSS */
+ return 1; /* RSTD */
}
OMAP_BAD_REG(offset);
@@ -432,7 +432,7 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
}
switch (offset) {
- case 0x00: /* MMC_CMD */
+ case 0x00: /* MMC_CMD */
if (!s->enable)
break;
@@ -447,17 +447,17 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
omap_mmc_update(s);
break;
- case 0x04: /* MMC_ARGL */
+ case 0x04: /* MMC_ARGL */
s->arg &= 0xffff0000;
s->arg |= 0x0000ffff & value;
break;
- case 0x08: /* MMC_ARGH */
+ case 0x08: /* MMC_ARGH */
s->arg &= 0x0000ffff;
s->arg |= value << 16;
break;
- case 0x0c: /* MMC_CON */
+ case 0x0c: /* MMC_CON */
s->dw = (value >> 15) & 1;
s->mode = (value >> 12) & 3;
s->enable = (value >> 11) & 1;
@@ -477,27 +477,27 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
omap_mmc_pseudo_reset(s);
break;
- case 0x10: /* MMC_STAT */
+ case 0x10: /* MMC_STAT */
s->status &= ~value;
omap_mmc_interrupts_update(s);
break;
- case 0x14: /* MMC_IE */
+ case 0x14: /* MMC_IE */
s->mask = value & 0x7fff;
omap_mmc_interrupts_update(s);
break;
- case 0x18: /* MMC_CTO */
+ case 0x18: /* MMC_CTO */
s->cto = value & 0xff;
if (s->cto > 0xfd && s->rev <= 1)
printf("MMC: CTO of 0xff and 0xfe cannot be used!\n");
break;
- case 0x1c: /* MMC_DTO */
+ case 0x1c: /* MMC_DTO */
s->dto = value & 0xffff;
break;
- case 0x20: /* MMC_DATA */
+ case 0x20: /* MMC_DATA */
/* TODO: support 8-bit access */
if (s->fifo_len == 32)
break;
@@ -508,18 +508,18 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
omap_mmc_interrupts_update(s);
break;
- case 0x24: /* MMC_BLEN */
+ case 0x24: /* MMC_BLEN */
s->blen = (value & 0x07ff) + 1;
s->blen_counter = s->blen;
break;
- case 0x28: /* MMC_NBLK */
+ case 0x28: /* MMC_NBLK */
s->nblk = (value & 0x07ff) + 1;
s->nblk_counter = s->nblk;
s->blen_counter = s->blen;
break;
- case 0x2c: /* MMC_BUF */
+ case 0x2c: /* MMC_BUF */
s->rx_dma = (value >> 15) & 1;
s->af_level = (value >> 8) & 0x1f;
s->tx_dma = (value >> 7) & 1;
@@ -534,38 +534,38 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
break;
/* SPI, SDIO and TEST modes unimplemented */
- case 0x30: /* MMC_SPI (OMAP1 only) */
+ case 0x30: /* MMC_SPI (OMAP1 only) */
break;
- case 0x34: /* MMC_SDIO */
+ case 0x34: /* MMC_SDIO */
s->sdio = value & (s->rev >= 2 ? 0xfbf3 : 0x2020);
s->cdet_wakeup = (value >> 9) & 1;
s->cdet_enable = (value >> 2) & 1;
break;
- case 0x38: /* MMC_SYST */
+ case 0x38: /* MMC_SYST */
break;
- case 0x3c: /* MMC_REV */
- case 0x40: /* MMC_RSP0 */
- case 0x44: /* MMC_RSP1 */
- case 0x48: /* MMC_RSP2 */
- case 0x4c: /* MMC_RSP3 */
- case 0x50: /* MMC_RSP4 */
- case 0x54: /* MMC_RSP5 */
- case 0x58: /* MMC_RSP6 */
- case 0x5c: /* MMC_RSP7 */
+ case 0x3c: /* MMC_REV */
+ case 0x40: /* MMC_RSP0 */
+ case 0x44: /* MMC_RSP1 */
+ case 0x48: /* MMC_RSP2 */
+ case 0x4c: /* MMC_RSP3 */
+ case 0x50: /* MMC_RSP4 */
+ case 0x54: /* MMC_RSP5 */
+ case 0x58: /* MMC_RSP6 */
+ case 0x5c: /* MMC_RSP7 */
OMAP_RO_REG(offset);
break;
/* OMAP2-specific */
- case 0x60: /* MMC_IOSR */
+ case 0x60: /* MMC_IOSR */
if (value & 0xf)
printf("MMC: SDIO bits used!\n");
break;
- case 0x64: /* MMC_SYSC */
- if (value & (1 << 2)) /* SRTS */
+ case 0x64: /* MMC_SYSC */
+ if (value & (1 << 2)) /* SRTS */
omap_mmc_reset(s);
break;
- case 0x68: /* MMC_SYSS */
+ case 0x68: /* MMC_SYSS */
OMAP_RO_REG(offset);
break;
--
2.47.1
next prev parent reply other threads:[~2025-01-31 21:09 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-31 21:04 [PULL 00/36] Misc HW patches for 2025-01-31 Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 01/36] hw/rx/rx-gdbsim: Remove unnecessary uses of &first_cpu Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 02/36] hw/mips/loongson3_virt: Factor generic_cpu_reset() out Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 03/36] hw/mips/loongson3_virt: Invert vCPU creation order to remove &first_cpu Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 04/36] hw/mips/loongson3_virt: Have fw_conf_init() access local loaderparams Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 05/36] hw/mips/loongson3_virt: Pass CPU argument to get_cpu_freq_hz() Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 06/36] hw/mips/loongson3_bootp: Include missing headers Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 07/36] hw/mips/loongson3: Propagate cpu_count to init_loongson_params() Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 08/36] hw/mips/loongson3_virt: Propagate cpu_count to init_boot_param() Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 09/36] hw/mips/loongson3_bootp: Propagate processor_id to init_cpu_info() Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 10/36] hw/mips/loongson3_virt: Propagate processor_id to init_loongson_params() Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 11/36] hw/mips/loongson3_virt: Propagate %processor_id to init_boot_param() Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 12/36] hw/mips/loongson3_bootp: Move to common_ss[] Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 13/36] hw/irq: Introduce qemu_init_irqs() helper Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 14/36] hw/ipack: Clarify KConfig symbols Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 15/36] hw/ipack: Remove legacy qemu_allocate_irqs() use Philippe Mathieu-Daudé
2025-01-31 21:04 ` [PULL 16/36] hw/sh4/r2d: Convert legacy qemu_allocate_irqs() to qemu_init_irqs() Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 17/36] hw/char/pci-multi: Convert legacy qemu_allocate_irqs to qemu_init_irq Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 18/36] hw/misc/i2c-echo: add tracing Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 19/36] hw/usb/hcd-ehci: Fix debug printf format string Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 20/36] hw/avr/boot: Replace load_elf_ram_sym() -> load_elf_as() Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 21/36] hw/loader: Remove unused load_elf_ram() Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 22/36] hw/loader: Clarify local variable name in load_elf_ram_sym() Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 23/36] hw/loader: Pass ELFDATA endian order argument to load_elf_ram_sym() Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 24/36] hw/loader: Pass ELFDATA endian order argument to load_elf_as() Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 25/36] hw/loader: Pass ELFDATA endian order argument to load_elf() Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 26/36] hw/sd/omap_mmc: Do a minimal conversion to QDev Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 27/36] hw/sd/omap_mmc: Convert remaining 'struct omap_mmc_s' uses to OMAPMMCState Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 28/36] hw/sd/omap_mmc: Convert output qemu_irqs to gpio and sysbus IRQ APIs Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 29/36] hw/sd/omap_mmc: Convert to SDBus API Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 30/36] hw/sd/omap_mmc: Use similar API for "wire up omap_clk" to other OMAP devices Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 31/36] hw/arm/omap1: Inline creation of MMC Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 32/36] hw/sd/omap_mmc: Remove unused coverswitch qemu_irq Philippe Mathieu-Daudé
2025-01-31 21:05 ` Philippe Mathieu-Daudé [this message]
2025-01-31 21:05 ` [PULL 34/36] hw/sd: Remove unused 'enable' method from SDCardClass Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 35/36] hw/sd: Remove unused legacy functions, stop killing mammoths Philippe Mathieu-Daudé
2025-01-31 21:05 ` [PULL 36/36] hw/sd: Remove unused SDState::enable Philippe Mathieu-Daudé
2025-02-02 17:49 ` [PULL 00/36] Misc HW patches for 2025-01-31 Stefan Hajnoczi
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