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[2003:fa:af00:4300:6a2c:ae69:f03f:1c85]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438e23d42c7sm187233595e9.3.2025.02.04.01.21.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 01:21:20 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Bernhard Beschow , qemu-arm@nongnu.org, Peter Maydell , Andrey Smirnov , Paolo Bonzini Subject: [PATCH v2 00/18] Add i.MX 8M Plus EVK machine Date: Tue, 4 Feb 2025 10:20:54 +0100 Message-ID: <20250204092112.26957-1-shentey@gmail.com> X-Mailer: git-send-email 2.48.1 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=shentey@gmail.com; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This series adds a new aarch64 machine to QEMU: i.MX 8M Plus EVK [1]. It al= lows=0D for running Linux distributions such as Buildroot=0D (freescale_imx8mpevk_defconfig) and Arch Linux [2] via direct kernel boot.= =0D U-Boot does not work yet. I plan to use this machine myself and I also want= to=0D make it available to a bigger audience, so I propose to add it to QEMU. My = goal=0D would be to have it added for 10.0.=0D =0D The series is structured as follows: The first three patches fix some issue= s in=0D device models reused by the new machine. Patches 4-17 add the machine step = by=0D step which includes documentation. The last patch adds an I=C2=B2C RTC whic= h I'd like=0D to use along with the new machine.=0D =0D I've based some code on existing one (see "Based on" in file headers) and I= 'm=0D unsure how to handle the licensing and attribution correctly -- advice welc= ome.=0D =0D v2:=0D * Rebase onto master, eliminating some patches from the series=0D * Initialize ROM with memory_region_init_rom() (Zoltan)=0D * Mark the machine as "Maintained" (Peter)=0D * Do not select TEST_DEVICES (Peter)=0D * Have separate sources for the two clock tree modules (Peter)=0D * Make PCI devices attach to the correct bus (Peter)=0D * Avoid adding documentation that is removed later (Zoltan) Instead, docume= nt=0D Buildroot process in the first place and change it slightly.=0D * Drop TCA6416 device model (Phil, Dmitrii)=0D * Add pca955* Kconfig cleanup patch=0D =0D [1] https://www.nxp.com/design/design-center/development-boards-and-designs= /8MPLUSLPD4-EVK=0D [2] https://archlinuxarm.org/platforms/armv8/generic=0D =0D Bernhard Beschow (18):=0D hw/usb/hcd-dwc3: Align global registers size with Linux=0D hw/pci-host/designware: Prevent device attachment on internal PCIe=0D root bus=0D hw/gpio/pca955*: Move Kconfig switches next to implementations=0D hw/arm: Add i.MX 8M Plus EVK board=0D hw/arm/fsl-imx8mp: Implement clock tree=0D hw/arm/fsl-imx8mp: Add SNVS=0D hw/arm/fsl-imx8mp: Add USDHC storage controllers=0D hw/arm/fsl-imx8mp: Add PCIe support=0D hw/arm/fsl-imx8mp: Add GPIO controllers=0D hw/arm/fsl-imx8mp: Add I2C controllers=0D hw/arm/fsl-imx8mp: Add SPI controllers=0D hw/arm/fsl-imx8mp: Add watchdog support=0D hw/arm/fsl-imx8mp: Implement gneral purpose timers=0D hw/arm/fsl-imx8mp: Add Ethernet controller=0D hw/arm/fsl-imx8mp: Add USB support=0D hw/arm/fsl-imx8mp: Add boot ROM=0D hw/arm/fsl-imx8mp: Add on-chip RAM=0D hw/rtc: Add Ricoh RS5C372 RTC emulation=0D =0D MAINTAINERS | 15 +=0D docs/system/arm/imx8mp-evk.rst | 72 +++=0D docs/system/target-arm.rst | 1 +=0D include/hw/arm/fsl-imx8mp.h | 285 +++++++++++=0D include/hw/misc/imx8mp_analog.h | 81 +++=0D include/hw/misc/imx8mp_ccm.h | 30 ++=0D include/hw/pci-host/designware.h | 7 +=0D include/hw/pci-host/fsl_imx8m_phy.h | 27 +=0D include/hw/timer/imx_gpt.h | 1 +=0D include/hw/usb/hcd-dwc3.h | 2 +-=0D hw/arm/fsl-imx8mp.c | 736 ++++++++++++++++++++++++++++=0D hw/arm/imx8mp-evk.c | 74 +++=0D hw/misc/imx8mp_analog.c | 160 ++++++=0D hw/misc/imx8mp_ccm.c | 175 +++++++=0D hw/pci-host/designware.c | 18 +-=0D hw/pci-host/fsl_imx8m_phy.c | 88 ++++=0D hw/rtc/rs5c372.c | 227 +++++++++=0D hw/timer/imx_gpt.c | 25 +=0D hw/usb/hcd-dwc3.c | 5 +=0D hw/arm/Kconfig | 24 +=0D hw/arm/meson.build | 2 +=0D hw/gpio/Kconfig | 10 +=0D hw/misc/Kconfig | 14 +-=0D hw/misc/meson.build | 2 +=0D hw/pci-host/Kconfig | 3 +=0D hw/pci-host/meson.build | 1 +=0D hw/rtc/Kconfig | 5 +=0D hw/rtc/meson.build | 1 +=0D hw/rtc/trace-events | 4 +=0D pc-bios/imx8mp-boot.rom | Bin 0 -> 258048 bytes=0D pc-bios/meson.build | 1 +=0D 31 files changed, 2086 insertions(+), 10 deletions(-)=0D create mode 100644 docs/system/arm/imx8mp-evk.rst=0D create mode 100644 include/hw/arm/fsl-imx8mp.h=0D create mode 100644 include/hw/misc/imx8mp_analog.h=0D create mode 100644 include/hw/misc/imx8mp_ccm.h=0D create mode 100644 include/hw/pci-host/fsl_imx8m_phy.h=0D create mode 100644 hw/arm/fsl-imx8mp.c=0D create mode 100644 hw/arm/imx8mp-evk.c=0D create mode 100644 hw/misc/imx8mp_analog.c=0D create mode 100644 hw/misc/imx8mp_ccm.c=0D create mode 100644 hw/pci-host/fsl_imx8m_phy.c=0D create mode 100644 hw/rtc/rs5c372.c=0D create mode 100644 pc-bios/imx8mp-boot.rom=0D =0D -- =0D 2.48.1=0D =0D