From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Bastian Koppelmann" <kbastian@mail.uni-paderborn.de>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH] target/tricore: Inline TARGET_LONG_BITS in decode_rr_logical_shift()
Date: Thu, 6 Feb 2025 18:32:58 +0100 [thread overview]
Message-ID: <20250206173258.36624-1-philmd@linaro.org> (raw)
We only support 32-bit TriCore architecture.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/tricore/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 6819b776686..c5b783b6a70 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -5936,7 +5936,7 @@ static void decode_rr_logical_shift(DisasContext *ctx)
break;
case OPC2_32_RR_CLO:
tcg_gen_not_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]);
- tcg_gen_clzi_tl(cpu_gpr_d[r3], cpu_gpr_d[r3], TARGET_LONG_BITS);
+ tcg_gen_clzi_tl(cpu_gpr_d[r3], cpu_gpr_d[r3], 32);
break;
case OPC2_32_RR_CLO_H:
gen_helper_clo_h(cpu_gpr_d[r3], cpu_gpr_d[r1]);
@@ -5948,7 +5948,7 @@ static void decode_rr_logical_shift(DisasContext *ctx)
gen_helper_cls_h(cpu_gpr_d[r3], cpu_gpr_d[r1]);
break;
case OPC2_32_RR_CLZ:
- tcg_gen_clzi_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], TARGET_LONG_BITS);
+ tcg_gen_clzi_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], 32);
break;
case OPC2_32_RR_CLZ_H:
gen_helper_clz_h(cpu_gpr_d[r3], cpu_gpr_d[r1]);
--
2.47.1
next reply other threads:[~2025-02-06 17:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-06 17:32 Philippe Mathieu-Daudé [this message]
2025-02-06 17:47 ` [PATCH] target/tricore: Inline TARGET_LONG_BITS in decode_rr_logical_shift() Richard Henderson
2025-02-06 18:20 ` Philippe Mathieu-Daudé
2025-02-07 8:49 ` Bastian Koppelmann
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