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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
	qemu-riscv@nongnu.org,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
	"Bin Meng" <bmeng.cn@gmail.com>,
	"Weiwei Li" <liwei1518@gmail.com>,
	"Sunil V L" <sunilvl@ventanamicro.com>,
	"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH 0/7] hw/riscv: Move few units to common_ss[]
Date: Thu,  6 Feb 2025 19:18:20 +0100	[thread overview]
Message-ID: <20250206181827.41557-1-philmd@linaro.org> (raw)

Remove target-specificity in some units and move them to
the meson common_ss[] source set to build them once.

Philippe Mathieu-Daudé (7):
  MAINTAINERS: Unify Alistair's professional email address
  target/riscv: Move target-agnostic definitions to 'cpu-qom.h'
  hw/riscv/opentitan: Include missing 'exec/address-spaces.h' header
  hw/riscv/boot: Use 'hwaddr' type for firmware addresses
  hw/riscv/iommu: Reduce needs for target-specific code
  hw/riscv/hart: Make 'riscv_hart.h' header target-agnostic
  hw/riscv: Move few objects to common_ss[] to build them once

 MAINTAINERS                     | 12 +++++-----
 include/hw/riscv/boot.h         | 21 +++++++++--------
 include/hw/riscv/boot_opensbi.h | 14 ++++++------
 include/hw/riscv/riscv_hart.h   |  4 ++--
 target/riscv/cpu-qom.h          | 40 +++++++++++++++++++++++++++++++++
 target/riscv/cpu.h              | 24 --------------------
 target/riscv/cpu_bits.h         | 15 -------------
 hw/riscv/boot.c                 | 28 +++++++++++------------
 hw/riscv/opentitan.c            |  1 +
 hw/riscv/riscv-iommu-pci.c      |  5 +++--
 hw/riscv/riscv-iommu-sys.c      |  1 -
 hw/riscv/riscv-iommu.c          |  1 +
 hw/riscv/virt-acpi-build.c      |  1 +
 hw/riscv/meson.build            |  5 +++--
 14 files changed, 88 insertions(+), 84 deletions(-)

-- 
2.47.1



             reply	other threads:[~2025-02-06 18:19 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-06 18:18 Philippe Mathieu-Daudé [this message]
2025-02-06 18:18 ` [PATCH 1/7] MAINTAINERS: Unify Alistair's professional email address Philippe Mathieu-Daudé
2025-02-06 18:19   ` Philippe Mathieu-Daudé
2025-02-06 20:54   ` Richard Henderson
2025-02-10  0:24   ` Alistair Francis
2025-02-06 18:18 ` [PATCH 2/7] target/riscv: Move target-agnostic definitions to 'cpu-qom.h' Philippe Mathieu-Daudé
2025-02-08 16:51   ` Philippe Mathieu-Daudé
2025-02-09  7:34   ` Paolo Bonzini
2025-03-06  7:47     ` Philippe Mathieu-Daudé
2025-02-06 18:18 ` [PATCH 3/7] hw/riscv/opentitan: Include missing 'exec/address-spaces.h' header Philippe Mathieu-Daudé
2025-02-06 20:54   ` Richard Henderson
2025-02-10  0:21   ` Alistair Francis
2025-02-06 18:18 ` [PATCH 4/7] hw/riscv/boot: Use 'hwaddr' type for firmware addresses Philippe Mathieu-Daudé
2025-02-06 18:18 ` [PATCH 5/7] hw/riscv/iommu: Reduce needs for target-specific code Philippe Mathieu-Daudé
2025-02-06 18:18 ` [PATCH 6/7] hw/riscv/hart: Make 'riscv_hart.h' header target-agnostic Philippe Mathieu-Daudé
2025-02-06 18:18 ` [PATCH 7/7] hw/riscv: Move few objects to common_ss[] to build them once Philippe Mathieu-Daudé

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