From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
qemu-riscv@nongnu.org,
"Alistair Francis" <alistair.francis@wdc.com>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Bin Meng" <bmeng.cn@gmail.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"Sunil V L" <sunilvl@ventanamicro.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH 5/7] hw/riscv/iommu: Reduce needs for target-specific code
Date: Thu, 6 Feb 2025 19:18:25 +0100 [thread overview]
Message-ID: <20250206181827.41557-6-philmd@linaro.org> (raw)
In-Reply-To: <20250206181827.41557-1-philmd@linaro.org>
Use the qemu_target_page_size() runtime function instead
of the TARGET_PAGE_SIZE definition, remove unnecessary
"exec/exec-all.h" header.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/riscv/riscv-iommu-pci.c | 5 +++--
hw/riscv/riscv-iommu-sys.c | 1 -
hw/riscv/riscv-iommu.c | 1 +
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/riscv/riscv-iommu-pci.c b/hw/riscv/riscv-iommu-pci.c
index 12451869e41..d8779481421 100644
--- a/hw/riscv/riscv-iommu-pci.c
+++ b/hw/riscv/riscv-iommu-pci.c
@@ -22,13 +22,13 @@
#include "hw/pci/pci_bus.h"
#include "hw/qdev-properties.h"
#include "hw/riscv/riscv_hart.h"
+#include "exec/target_page.h"
#include "migration/vmstate.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "qemu/host-utils.h"
#include "qom/object.h"
-#include "cpu_bits.h"
#include "riscv-iommu.h"
#include "riscv-iommu-bits.h"
#include "trace.h"
@@ -102,7 +102,8 @@ static void riscv_iommu_pci_realize(PCIDevice *dev, Error **errp)
qdev_realize(DEVICE(iommu), NULL, errp);
memory_region_init(&s->bar0, OBJECT(s), "riscv-iommu-bar0",
- QEMU_ALIGN_UP(memory_region_size(&iommu->regs_mr), TARGET_PAGE_SIZE));
+ QEMU_ALIGN_UP(memory_region_size(&iommu->regs_mr),
+ qemu_target_page_size()));
memory_region_add_subregion(&s->bar0, 0, &iommu->regs_mr);
pcie_endpoint_cap_init(dev, 0);
diff --git a/hw/riscv/riscv-iommu-sys.c b/hw/riscv/riscv-iommu-sys.c
index 65b24fb07de..bbe839ed241 100644
--- a/hw/riscv/riscv-iommu-sys.c
+++ b/hw/riscv/riscv-iommu-sys.c
@@ -26,7 +26,6 @@
#include "qemu/host-utils.h"
#include "qemu/module.h"
#include "qom/object.h"
-#include "exec/exec-all.h"
#include "trace.h"
#include "riscv-iommu.h"
diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
index e7568ca227a..fb763e6e69d 100644
--- a/hw/riscv/riscv-iommu.c
+++ b/hw/riscv/riscv-iommu.c
@@ -26,6 +26,7 @@
#include "qapi/error.h"
#include "qemu/timer.h"
+#include "target/riscv/cpu.h"
#include "cpu_bits.h"
#include "riscv-iommu.h"
#include "riscv-iommu-bits.h"
--
2.47.1
next prev parent reply other threads:[~2025-02-06 18:21 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-06 18:18 [PATCH 0/7] hw/riscv: Move few units to common_ss[] Philippe Mathieu-Daudé
2025-02-06 18:18 ` [PATCH 1/7] MAINTAINERS: Unify Alistair's professional email address Philippe Mathieu-Daudé
2025-02-06 18:19 ` Philippe Mathieu-Daudé
2025-02-06 20:54 ` Richard Henderson
2025-02-10 0:24 ` Alistair Francis
2025-02-06 18:18 ` [PATCH 2/7] target/riscv: Move target-agnostic definitions to 'cpu-qom.h' Philippe Mathieu-Daudé
2025-02-08 16:51 ` Philippe Mathieu-Daudé
2025-02-09 7:34 ` Paolo Bonzini
2025-03-06 7:47 ` Philippe Mathieu-Daudé
2025-02-06 18:18 ` [PATCH 3/7] hw/riscv/opentitan: Include missing 'exec/address-spaces.h' header Philippe Mathieu-Daudé
2025-02-06 20:54 ` Richard Henderson
2025-02-10 0:21 ` Alistair Francis
2025-02-06 18:18 ` [PATCH 4/7] hw/riscv/boot: Use 'hwaddr' type for firmware addresses Philippe Mathieu-Daudé
2025-02-06 18:18 ` Philippe Mathieu-Daudé [this message]
2025-02-06 18:18 ` [PATCH 6/7] hw/riscv/hart: Make 'riscv_hart.h' header target-agnostic Philippe Mathieu-Daudé
2025-02-06 18:18 ` [PATCH 7/7] hw/riscv: Move few objects to common_ss[] to build them once Philippe Mathieu-Daudé
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