From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
qemu-arm@nongnu.org,
"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v6 4/7] hw/char/pl011: Trace FIFO enablement
Date: Sat, 8 Feb 2025 17:39:08 +0100 [thread overview]
Message-ID: <20250208163911.54522-5-philmd@linaro.org> (raw)
In-Reply-To: <20250208163911.54522-1-philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/char/pl011.c | 4 +++-
hw/char/trace-events | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index b9c9e5b5983..447f185e2d5 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -148,6 +148,7 @@ static bool pl011_loopback_enabled(PL011State *s)
static bool pl011_is_fifo_enabled(PL011State *s)
{
+ trace_pl011_fifo_is_enabled((s->lcr & LCR_FEN) != 0);
return (s->lcr & LCR_FEN) != 0;
}
@@ -464,8 +465,9 @@ static void pl011_write(void *opaque, hwaddr offset,
pl011_trace_baudrate_change(s);
break;
case 11: /* UARTLCR_H */
- /* Reset the FIFO state on FIFO enable or disable */
if ((s->lcr ^ value) & LCR_FEN) {
+ /* Reset the FIFO state on FIFO enable or disable */
+ trace_pl011_fifo_enable(value & LCR_FEN);
pl011_reset_rx_fifo(s);
pl011_reset_tx_fifo(s);
}
diff --git a/hw/char/trace-events b/hw/char/trace-events
index 3d07866be5c..dd635ac6012 100644
--- a/hw/char/trace-events
+++ b/hw/char/trace-events
@@ -63,6 +63,8 @@ pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x valu
pl011_read_fifo(int read_count) "FIFO read, read_count now %d"
pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s"
pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d returning %d"
+pl011_fifo_enable(bool enable) "enable:%u"
+pl011_fifo_is_enabled(bool enabled) "enabled:%u"
pl011_fifo_rx_put(uint32_t c, int read_count) "new char 0x%02x read_count now %d"
pl011_fifo_rx_full(void) "RX FIFO now full, RXFF set"
pl011_fifo_tx_put(uint8_t byte) "TX FIFO push char [0x%02x]"
--
2.47.1
next prev parent reply other threads:[~2025-02-08 16:40 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-08 16:39 [PATCH v6 0/7] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
2025-02-08 16:39 ` [PATCH v6 1/7] hw/char/pl011: Warn when using disabled receiver Philippe Mathieu-Daudé
2025-02-08 16:39 ` [PATCH v6 2/7] hw/char/pl011: Add transmit FIFO to PL011State Philippe Mathieu-Daudé
2025-02-08 16:39 ` [PATCH v6 3/7] hw/char/pl011: Introduce pl011_xmit() as GSource Philippe Mathieu-Daudé
2025-02-17 14:25 ` Peter Maydell
2025-02-08 16:39 ` Philippe Mathieu-Daudé [this message]
2025-02-17 14:27 ` [PATCH v6 4/7] hw/char/pl011: Trace FIFO enablement Peter Maydell
2025-02-17 14:39 ` Peter Maydell
2025-02-17 14:45 ` Philippe Mathieu-Daudé
2025-02-08 16:39 ` [PATCH v6 5/7] hw/char/pl011: Consider TX FIFO overrun error Philippe Mathieu-Daudé
2025-02-17 14:29 ` Peter Maydell
2025-02-17 14:52 ` Peter Maydell
2025-02-17 15:01 ` Philippe Mathieu-Daudé
2025-02-08 16:39 ` [PATCH v6 6/7] hw/char/pl011: Drain TX FIFO when no backend connected Philippe Mathieu-Daudé
2025-02-17 14:30 ` Peter Maydell
2025-02-08 16:39 ` [PATCH v6 7/7] hw/char/pl011: Implement TX FIFO Philippe Mathieu-Daudé
2025-02-17 14:37 ` Peter Maydell
2025-02-17 14:55 ` [PATCH v6 0/7] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Peter Maydell
2025-02-18 13:54 ` Peter Maydell
2025-02-20 10:43 ` Peter Maydell
2025-02-20 10:52 ` Peter Maydell
2025-02-20 11:04 ` Peter Maydell
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