From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
"Thomas Huth" <thuth@redhat.com>,
qemu-s390x@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
qemu-ppc@nongnu.org, "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v2 01/10] target: Set disassemble_info::endian value for little-endian targets
Date: Mon, 10 Feb 2025 22:29:21 +0100 [thread overview]
Message-ID: <20250210212931.62401-2-philmd@linaro.org> (raw)
In-Reply-To: <20250210212931.62401-1-philmd@linaro.org>
Have the CPUClass::disas_set_info() callback set the
disassemble_info::endian field for little-endian targets.
Note, there was no disas_set_info() handler registered
for the TriCore target, so we implement one.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
---
target/alpha/cpu.c | 1 +
target/avr/cpu.c | 1 +
target/hexagon/cpu.c | 1 +
target/i386/cpu.c | 1 +
target/loongarch/cpu.c | 1 +
target/rx/cpu.c | 1 +
target/tricore/cpu.c | 6 ++++++
7 files changed, 12 insertions(+)
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index da21f99a6ac..acf81fda371 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -85,6 +85,7 @@ static int alpha_cpu_mmu_index(CPUState *cs, bool ifetch)
static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
{
+ info->endian = BFD_ENDIAN_LITTLE;
info->mach = bfd_mach_alpha_ev6;
info->print_insn = print_insn_alpha;
}
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 5a0e21465e5..2871d30540a 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -102,6 +102,7 @@ static void avr_cpu_reset_hold(Object *obj, ResetType type)
static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
{
+ info->endian = BFD_ENDIAN_LITTLE;
info->mach = bfd_arch_avr;
info->print_insn = avr_print_insn;
}
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 238e63bcea4..a9beb9a1757 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -293,6 +293,7 @@ static void hexagon_cpu_reset_hold(Object *obj, ResetType type)
static void hexagon_cpu_disas_set_info(CPUState *s, disassemble_info *info)
{
info->print_insn = print_insn_hexagon;
+ info->endian = BFD_ENDIAN_LITTLE;
}
static void hexagon_cpu_realize(DeviceState *dev, Error **errp)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index b5dd60d2812..85815c0805d 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -8497,6 +8497,7 @@ static void x86_disas_set_info(CPUState *cs, disassemble_info *info)
X86CPU *cpu = X86_CPU(cs);
CPUX86State *env = &cpu->env;
+ info->endian = BFD_ENDIAN_LITTLE;
info->mach = (env->hflags & HF_CS64_MASK ? bfd_mach_x86_64
: env->hflags & HF_CS32_MASK ? bfd_mach_i386_i386
: bfd_mach_i386_i8086);
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 227870e2856..cb9b9f909f3 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -617,6 +617,7 @@ static void loongarch_cpu_reset_hold(Object *obj, ResetType type)
static void loongarch_cpu_disas_set_info(CPUState *s, disassemble_info *info)
{
+ info->endian = BFD_ENDIAN_LITTLE;
info->print_insn = print_insn_loongarch;
}
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 154906ef5f4..acd5a6e12da 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -160,6 +160,7 @@ static void rx_cpu_set_irq(void *opaque, int no, int request)
static void rx_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
{
+ info->endian = BFD_ENDIAN_LITTLE;
info->mach = bfd_mach_rx;
info->print_insn = print_insn_rx;
}
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index eb794674c8d..49c18a0cd92 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -35,6 +35,11 @@ static const gchar *tricore_gdb_arch_name(CPUState *cs)
return "tricore";
}
+static void tricore_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
+{
+ info->endian = BFD_ENDIAN_LITTLE;
+}
+
static void tricore_cpu_set_pc(CPUState *cs, vaddr value)
{
cpu_env(cs)->PC = value & ~(target_ulong)1;
@@ -201,6 +206,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data)
cc->gdb_num_core_regs = 44;
cc->gdb_arch_name = tricore_gdb_arch_name;
+ cc->disas_set_info = tricore_cpu_disas_set_info;
cc->dump_state = tricore_cpu_dump_state;
cc->set_pc = tricore_cpu_set_pc;
cc->get_pc = tricore_cpu_get_pc;
--
2.47.1
next prev parent reply other threads:[~2025-02-10 21:31 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-10 21:29 [PATCH v2 00/10] disas: Have CPUClass::disas_set_info() callback set the endianness Philippe Mathieu-Daudé
2025-02-10 21:29 ` Philippe Mathieu-Daudé [this message]
2025-02-10 21:54 ` [PATCH v2 01/10] target: Set disassemble_info::endian value for little-endian targets Richard Henderson
2025-02-10 22:05 ` Philippe Mathieu-Daudé
2025-02-10 21:29 ` [PATCH v2 02/10] target: Set disassemble_info::endian value for big-endian targets Philippe Mathieu-Daudé
2025-02-10 21:55 ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 03/10] target/arm: Set disassemble_info::endian value in disas_set_info() Philippe Mathieu-Daudé
2025-02-10 22:10 ` Richard Henderson
2025-02-10 22:59 ` Philippe Mathieu-Daudé
2025-02-10 23:37 ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 04/10] target/microblaze: Set disassemble_info::endian value in disas_set_info Philippe Mathieu-Daudé
2025-02-10 22:11 ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 05/10] target/mips: Set disassemble_info::endian value in disas_set_info() Philippe Mathieu-Daudé
2025-02-10 22:12 ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 06/10] target/ppc: " Philippe Mathieu-Daudé
2025-02-10 22:12 ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 07/10] target/riscv: " Philippe Mathieu-Daudé
2025-02-10 22:12 ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 08/10] target/sh4: " Philippe Mathieu-Daudé
2025-02-10 22:13 ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 09/10] target/xtensa: " Philippe Mathieu-Daudé
2025-02-10 22:13 ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 10/10] disas: Remove target_words_bigendian() call in initialize_debug_target() Philippe Mathieu-Daudé
2025-02-10 22:16 ` Richard Henderson
2025-03-06 13:58 ` [PATCH v2 00/10] disas: Have CPUClass::disas_set_info() callback set the endianness Philippe Mathieu-Daudé
2025-03-06 14:00 ` Philippe Mathieu-Daudé
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