From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Alistair Francis" <alistair@alistair23.me>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Igor Mitsyanko" <i.mitsyanko@gmail.com>,
qemu-arm@nongnu.org, "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v2 0/8] hw/arm: Explicit number of GIC external IRQs for Cortex A9/A15 MPCore
Date: Wed, 12 Feb 2025 16:43:25 +0100 [thread overview]
Message-ID: <20250212154333.28644-1-philmd@linaro.org> (raw)
Some boards based on Cortex-A9MP / Cortex-A15MP do not explicit
the number of external GIC IRQs, using some (implicit) default value,
not always trivial to figure out. Change that by removing the default
value, requiring MPCore objects to be created with the "num-irq" set.
Since v1:
- Remove generic comments (Peter)
Philippe Mathieu-Daudé (8):
hw/arm/exynos4210: Replace magic 32 by proper 'GIC_INTERNAL'
definition
hw/arm/exynos4210: Specify explicitly the GIC has 64 external IRQs
hw/arm/realview: Specify explicitly the GIC has 64 external IRQs
hw/arm/xilinx_zynq: Replace IRQ_OFFSET -> GIC_INTERNAL
hw/arm/xilinx_zynq: Specify explicitly the GIC has 64 external IRQs
hw/arm/vexpress: Specify explicitly the GIC has 64 external IRQs
hw/arm/highbank: Specify explicitly the GIC has 128 external IRQs
hw/cpu/arm_mpcore: Remove default values for GIC external IRQs
hw/arm/exynos4210.c | 10 ++++++++--
hw/arm/highbank.c | 8 ++++----
hw/arm/realview.c | 11 +++++++++--
hw/arm/vexpress.c | 7 +++++--
hw/arm/xilinx_zynq.c | 43 ++++++++++++++++++++++---------------------
hw/cpu/a15mpcore.c | 18 ++++++++++++------
hw/cpu/a9mpcore.c | 18 ++++++++++++------
7 files changed, 72 insertions(+), 43 deletions(-)
--
2.47.1
next reply other threads:[~2025-02-12 15:43 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-12 15:43 Philippe Mathieu-Daudé [this message]
2025-02-12 15:43 ` [PATCH v2 1/8] hw/arm/exynos4210: Replace magic 32 by proper 'GIC_INTERNAL' definition Philippe Mathieu-Daudé
2025-02-12 17:57 ` Richard Henderson
2025-02-12 15:43 ` [PATCH v2 2/8] hw/arm/exynos4210: Specify explicitly the GIC has 64 external IRQs Philippe Mathieu-Daudé
2025-02-12 17:59 ` Richard Henderson
2025-02-12 15:43 ` [PATCH v2 3/8] hw/arm/realview: " Philippe Mathieu-Daudé
2025-02-12 18:01 ` Richard Henderson
2025-02-12 15:43 ` [PATCH v2 4/8] hw/arm/xilinx_zynq: Replace IRQ_OFFSET -> GIC_INTERNAL Philippe Mathieu-Daudé
2025-02-12 18:02 ` Richard Henderson
2025-02-12 15:43 ` [PATCH v2 5/8] hw/arm/xilinx_zynq: Specify explicitly the GIC has 64 external IRQs Philippe Mathieu-Daudé
2025-02-12 18:10 ` Richard Henderson
2025-02-12 15:43 ` [PATCH v2 6/8] hw/arm/vexpress: " Philippe Mathieu-Daudé
2025-02-12 18:12 ` Richard Henderson
2025-02-12 15:43 ` [PATCH v2 7/8] hw/arm/highbank: Specify explicitly the GIC has 128 " Philippe Mathieu-Daudé
2025-02-12 18:12 ` Richard Henderson
2025-02-12 15:43 ` [PATCH v2 8/8] hw/cpu/arm_mpcore: Remove default values for GIC " Philippe Mathieu-Daudé
2025-02-12 18:13 ` Richard Henderson
2025-02-17 15:43 ` [PATCH v2 0/8] hw/arm: Explicit number of GIC external IRQs for Cortex A9/A15 MPCore Peter Maydell
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