From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: edgar.iglesias@gmail.com, philmd@linaro.org
Subject: [PATCH 1/9] target/microblaze: Split out mb_unaligned_access_internal
Date: Wed, 12 Feb 2025 14:01:47 -0800 [thread overview]
Message-ID: <20250212220155.1147144-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20250212220155.1147144-1-richard.henderson@linaro.org>
Use an explicit 64-bit type for the address to store in EAR.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/cpu.h | 3 +++
target/microblaze/helper.c | 25 ++++++++++++++++---------
2 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index f6879eee35..45f7f49809 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -372,6 +372,9 @@ bool mb_cpu_exec_interrupt(CPUState *cs, int int_req);
hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
MemTxAttrs *attrs);
#endif /* !CONFIG_USER_ONLY */
+G_NORETURN void mb_unaligned_access_internal(CPUState *cs, uint64_t addr,
+ MMUAccessType access_type,
+ uintptr_t retaddr);
G_NORETURN void mb_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr);
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index 5d3259ce31..8b096e3e58 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -268,20 +268,20 @@ bool mb_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
#endif /* !CONFIG_USER_ONLY */
-void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
- MMUAccessType access_type,
- int mmu_idx, uintptr_t retaddr)
+G_NORETURN
+void mb_unaligned_access_internal(CPUState *cs, uint64_t addr,
+ MMUAccessType access_type, uintptr_t retaddr)
{
- MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
+ CPUMBState *env = cpu_env(cs);
uint32_t esr, iflags;
/* Recover the pc and iflags from the corresponding insn_start. */
cpu_restore_state(cs, retaddr);
- iflags = cpu->env.iflags;
+ iflags = env->iflags;
qemu_log_mask(CPU_LOG_INT,
- "Unaligned access addr=" TARGET_FMT_lx " pc=%x iflags=%x\n",
- (target_ulong)addr, cpu->env.pc, iflags);
+ "Unaligned access addr=0x%" PRIx64 " pc=%x iflags=%x\n",
+ addr, env->pc, iflags);
esr = ESR_EC_UNALIGNED_DATA;
if (likely(iflags & ESR_ESS_FLAG)) {
@@ -290,8 +290,15 @@ void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
qemu_log_mask(LOG_UNIMP, "Unaligned access without ESR_ESS_FLAG\n");
}
- cpu->env.ear = addr;
- cpu->env.esr = esr;
+ env->ear = addr;
+ env->esr = esr;
cs->exception_index = EXCP_HW_EXCP;
cpu_loop_exit(cs);
}
+
+void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
+ MMUAccessType access_type,
+ int mmu_idx, uintptr_t retaddr)
+{
+ mb_unaligned_access_internal(cs, addr, access_type, retaddr);
+}
--
2.43.0
next prev parent reply other threads:[~2025-02-12 22:03 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-12 22:01 [PATCH 0/9] target/microblaze: Always use TARGET_LONG_BITS == 32 Richard Henderson
2025-02-12 22:01 ` Richard Henderson [this message]
2025-02-12 22:01 ` [PATCH 2/9] target/microblaze: Split out mb_transaction_failed_internal Richard Henderson
2025-02-13 12:59 ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 3/9] target/microblaze: Implement extended address load/store out of line Richard Henderson
2025-02-12 22:01 ` [PATCH 4/9] target/microblaze: Use uint64_t for CPUMBState.ear Richard Henderson
2025-02-13 12:42 ` Philippe Mathieu-Daudé
2025-02-13 16:11 ` Richard Henderson
2025-04-30 8:46 ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 5/9] target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea Richard Henderson
2025-02-13 12:49 ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 6/9] target/microblaze: Fix printf format in mmu_translate Richard Henderson
2025-02-12 22:01 ` [PATCH 7/9] target/microblaze: Use TARGET_LONG_BITS == 32 for system mode Richard Henderson
2025-02-12 22:01 ` [PATCH 8/9] target/microblaze: Drop DisasContext.r0 Richard Henderson
2025-02-13 12:51 ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 9/9] target/microblaze: Simplify compute_ldst_addr_type{a,b} Richard Henderson
2025-02-13 12:56 ` Philippe Mathieu-Daudé
2025-02-13 12:37 ` [PATCH 0/9] target/microblaze: Always use TARGET_LONG_BITS == 32 Philippe Mathieu-Daudé
2025-03-05 0:21 ` Philippe Mathieu-Daudé
2025-04-30 6:26 ` Philippe Mathieu-Daudé
2025-04-30 7:29 ` Philippe Mathieu-Daudé
2025-04-30 10:54 ` Edgar E. Iglesias
2025-04-30 10:38 ` Edgar E. Iglesias
2025-04-30 11:09 ` Edgar E. Iglesias
2025-04-30 12:45 ` Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250212220155.1147144-2-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=edgar.iglesias@gmail.com \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).