From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: edgar.iglesias@gmail.com, philmd@linaro.org
Subject: [PATCH 5/9] target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea
Date: Wed, 12 Feb 2025 14:01:51 -0800 [thread overview]
Message-ID: <20250212220155.1147144-6-richard.henderson@linaro.org> (raw)
In-Reply-To: <20250212220155.1147144-1-richard.henderson@linaro.org>
Use an explicit 64-bit type for extended addresses.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/translate.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 549013d25e..a1d81b0166 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -666,23 +666,23 @@ static TCGv compute_ldst_addr_typeb(DisasContext *dc, int ra, int imm)
}
#ifndef CONFIG_USER_ONLY
-static TCGv compute_ldst_addr_ea(DisasContext *dc, int ra, int rb)
+static TCGv_i64 compute_ldst_addr_ea(DisasContext *dc, int ra, int rb)
{
int addr_size = dc->cfg->addr_size;
- TCGv ret = tcg_temp_new();
+ TCGv_i64 ret = tcg_temp_new_i64();
if (addr_size == 32 || ra == 0) {
if (rb) {
- tcg_gen_extu_i32_tl(ret, cpu_R[rb]);
+ tcg_gen_extu_i32_i64(ret, cpu_R[rb]);
} else {
- tcg_gen_movi_tl(ret, 0);
+ return tcg_constant_i64(0);
}
} else {
if (rb) {
tcg_gen_concat_i32_i64(ret, cpu_R[rb], cpu_R[ra]);
} else {
- tcg_gen_extu_i32_tl(ret, cpu_R[ra]);
- tcg_gen_shli_tl(ret, ret, 32);
+ tcg_gen_extu_i32_i64(ret, cpu_R[ra]);
+ tcg_gen_shli_i64(ret, ret, 32);
}
if (addr_size < 64) {
/* Mask off out of range bits. */
@@ -766,7 +766,7 @@ static bool trans_lbuea(DisasContext *dc, arg_typea *arg)
#ifdef CONFIG_USER_ONLY
g_assert_not_reached();
#else
- TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
+ TCGv_i64 addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
gen_helper_lbuea(reg_for_write(dc, arg->rd), tcg_env, addr);
return true;
#endif
@@ -798,7 +798,7 @@ static bool trans_lhuea(DisasContext *dc, arg_typea *arg)
#ifdef CONFIG_USER_ONLY
g_assert_not_reached();
#else
- TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
+ TCGv_i64 addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
if ((dc->tb_flags & MSR_EE) && dc->cfg->unaligned_exceptions) {
record_unaligned_ess(dc, arg->rd, MO_16, false);
}
@@ -833,7 +833,7 @@ static bool trans_lwea(DisasContext *dc, arg_typea *arg)
#ifdef CONFIG_USER_ONLY
g_assert_not_reached();
#else
- TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
+ TCGv_i64 addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
if ((dc->tb_flags & MSR_EE) && dc->cfg->unaligned_exceptions) {
record_unaligned_ess(dc, arg->rd, MO_32, false);
}
@@ -925,7 +925,7 @@ static bool trans_sbea(DisasContext *dc, arg_typea *arg)
#ifdef CONFIG_USER_ONLY
g_assert_not_reached();
#else
- TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
+ TCGv_i64 addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
gen_helper_sbea(tcg_env, reg_for_read(dc, arg->rd), addr);
return true;
#endif
@@ -957,7 +957,7 @@ static bool trans_shea(DisasContext *dc, arg_typea *arg)
#ifdef CONFIG_USER_ONLY
g_assert_not_reached();
#else
- TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
+ TCGv_i64 addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
if ((dc->tb_flags & MSR_EE) && dc->cfg->unaligned_exceptions) {
record_unaligned_ess(dc, arg->rd, MO_16, true);
}
@@ -992,7 +992,7 @@ static bool trans_swea(DisasContext *dc, arg_typea *arg)
#ifdef CONFIG_USER_ONLY
g_assert_not_reached();
#else
- TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
+ TCGv_i64 addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
if ((dc->tb_flags & MSR_EE) && dc->cfg->unaligned_exceptions) {
record_unaligned_ess(dc, arg->rd, MO_32, true);
}
--
2.43.0
next prev parent reply other threads:[~2025-02-12 22:03 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-12 22:01 [PATCH 0/9] target/microblaze: Always use TARGET_LONG_BITS == 32 Richard Henderson
2025-02-12 22:01 ` [PATCH 1/9] target/microblaze: Split out mb_unaligned_access_internal Richard Henderson
2025-02-12 22:01 ` [PATCH 2/9] target/microblaze: Split out mb_transaction_failed_internal Richard Henderson
2025-02-13 12:59 ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 3/9] target/microblaze: Implement extended address load/store out of line Richard Henderson
2025-02-12 22:01 ` [PATCH 4/9] target/microblaze: Use uint64_t for CPUMBState.ear Richard Henderson
2025-02-13 12:42 ` Philippe Mathieu-Daudé
2025-02-13 16:11 ` Richard Henderson
2025-04-30 8:46 ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` Richard Henderson [this message]
2025-02-13 12:49 ` [PATCH 5/9] target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 6/9] target/microblaze: Fix printf format in mmu_translate Richard Henderson
2025-02-12 22:01 ` [PATCH 7/9] target/microblaze: Use TARGET_LONG_BITS == 32 for system mode Richard Henderson
2025-02-12 22:01 ` [PATCH 8/9] target/microblaze: Drop DisasContext.r0 Richard Henderson
2025-02-13 12:51 ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 9/9] target/microblaze: Simplify compute_ldst_addr_type{a,b} Richard Henderson
2025-02-13 12:56 ` Philippe Mathieu-Daudé
2025-02-13 12:37 ` [PATCH 0/9] target/microblaze: Always use TARGET_LONG_BITS == 32 Philippe Mathieu-Daudé
2025-03-05 0:21 ` Philippe Mathieu-Daudé
2025-04-30 6:26 ` Philippe Mathieu-Daudé
2025-04-30 7:29 ` Philippe Mathieu-Daudé
2025-04-30 10:54 ` Edgar E. Iglesias
2025-04-30 10:38 ` Edgar E. Iglesias
2025-04-30 11:09 ` Edgar E. Iglesias
2025-04-30 12:45 ` Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250212220155.1147144-6-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=edgar.iglesias@gmail.com \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).