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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: edgar.iglesias@gmail.com, philmd@linaro.org
Subject: [PATCH 8/9] target/microblaze: Drop DisasContext.r0
Date: Wed, 12 Feb 2025 14:01:54 -0800	[thread overview]
Message-ID: <20250212220155.1147144-9-richard.henderson@linaro.org> (raw)
In-Reply-To: <20250212220155.1147144-1-richard.henderson@linaro.org>

Return a constant 0 from reg_for_read, and a new
temporary from reg_for_write.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/microblaze/translate.c | 24 ++----------------------
 1 file changed, 2 insertions(+), 22 deletions(-)

diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index a1d81b0166..5750c45dac 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -63,9 +63,6 @@ typedef struct DisasContext {
     DisasContextBase base;
     const MicroBlazeCPUConfig *cfg;
 
-    TCGv_i32 r0;
-    bool r0_set;
-
     /* Decoder.  */
     uint32_t ext_imm;
     unsigned int tb_flags;
@@ -179,14 +176,7 @@ static TCGv_i32 reg_for_read(DisasContext *dc, int reg)
     if (likely(reg != 0)) {
         return cpu_R[reg];
     }
-    if (!dc->r0_set) {
-        if (dc->r0 == NULL) {
-            dc->r0 = tcg_temp_new_i32();
-        }
-        tcg_gen_movi_i32(dc->r0, 0);
-        dc->r0_set = true;
-    }
-    return dc->r0;
+    return tcg_constant_i32(0);
 }
 
 static TCGv_i32 reg_for_write(DisasContext *dc, int reg)
@@ -194,10 +184,7 @@ static TCGv_i32 reg_for_write(DisasContext *dc, int reg)
     if (likely(reg != 0)) {
         return cpu_R[reg];
     }
-    if (dc->r0 == NULL) {
-        dc->r0 = tcg_temp_new_i32();
-    }
-    return dc->r0;
+    return tcg_temp_new_i32();
 }
 
 static bool do_typea(DisasContext *dc, arg_typea *arg, bool side_effects,
@@ -1621,8 +1608,6 @@ static void mb_tr_init_disas_context(DisasContextBase *dcb, CPUState *cs)
     dc->cfg = &cpu->cfg;
     dc->tb_flags = dc->base.tb->flags;
     dc->ext_imm = dc->base.tb->cs_base;
-    dc->r0 = NULL;
-    dc->r0_set = false;
     dc->mem_index = cpu_mmu_index(cs, false);
     dc->jmp_cond = dc->tb_flags & D_FLAG ? TCG_COND_ALWAYS : TCG_COND_NEVER;
     dc->jmp_dest = -1;
@@ -1660,11 +1645,6 @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs)
         trap_illegal(dc, true);
     }
 
-    if (dc->r0) {
-        dc->r0 = NULL;
-        dc->r0_set = false;
-    }
-
     /* Discard the imm global when its contents cannot be used. */
     if ((dc->tb_flags & ~dc->tb_flags_to_set) & IMM_FLAG) {
         tcg_gen_discard_i32(cpu_imm);
-- 
2.43.0



  parent reply	other threads:[~2025-02-12 22:03 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-12 22:01 [PATCH 0/9] target/microblaze: Always use TARGET_LONG_BITS == 32 Richard Henderson
2025-02-12 22:01 ` [PATCH 1/9] target/microblaze: Split out mb_unaligned_access_internal Richard Henderson
2025-02-12 22:01 ` [PATCH 2/9] target/microblaze: Split out mb_transaction_failed_internal Richard Henderson
2025-02-13 12:59   ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 3/9] target/microblaze: Implement extended address load/store out of line Richard Henderson
2025-02-12 22:01 ` [PATCH 4/9] target/microblaze: Use uint64_t for CPUMBState.ear Richard Henderson
2025-02-13 12:42   ` Philippe Mathieu-Daudé
2025-02-13 16:11     ` Richard Henderson
2025-04-30  8:46   ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 5/9] target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea Richard Henderson
2025-02-13 12:49   ` Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 6/9] target/microblaze: Fix printf format in mmu_translate Richard Henderson
2025-02-12 22:01 ` [PATCH 7/9] target/microblaze: Use TARGET_LONG_BITS == 32 for system mode Richard Henderson
2025-02-12 22:01 ` Richard Henderson [this message]
2025-02-13 12:51   ` [PATCH 8/9] target/microblaze: Drop DisasContext.r0 Philippe Mathieu-Daudé
2025-02-12 22:01 ` [PATCH 9/9] target/microblaze: Simplify compute_ldst_addr_type{a,b} Richard Henderson
2025-02-13 12:56   ` Philippe Mathieu-Daudé
2025-02-13 12:37 ` [PATCH 0/9] target/microblaze: Always use TARGET_LONG_BITS == 32 Philippe Mathieu-Daudé
2025-03-05  0:21   ` Philippe Mathieu-Daudé
2025-04-30  6:26   ` Philippe Mathieu-Daudé
2025-04-30  7:29     ` Philippe Mathieu-Daudé
2025-04-30 10:54       ` Edgar E. Iglesias
2025-04-30 10:38     ` Edgar E. Iglesias
2025-04-30 11:09 ` Edgar E. Iglesias
2025-04-30 12:45   ` Philippe Mathieu-Daudé

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