From: Yong-Xuan Wang <yongxuan.wang@sifive.com>
To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: greentime.hu@sifive.com, vincent.chen@sifive.com,
frank.chang@sifive.com, jim.shu@sifive.com,
Yong-Xuan Wang <yongxuan.wang@sifive.com>
Subject: [PATCH 0/8] riscv: AIA: kernel-irqchip=off support
Date: Mon, 17 Feb 2025 16:17:20 +0800 [thread overview]
Message-ID: <20250217081730.9000-1-yongxuan.wang@sifive.com> (raw)
This series introduces the user-space AIA MSI emulation when using KVM
acceleration.
After this series, RISC-V QEMU virt machine with KVM acceleration has
3 parameters to control the type of irqchip and its emulation method:
- Machine prop "aia" controls the type of irqchip
- none: use PLIC and emulated in user-space
- aplic: use AIA wired and emulated in user-space
- aplic-imsic: use AIA MSI, emulation mode is determined by
"kernel-irqchip" and "riscv-imsic"
- Accel prop "kernel-irqchip", effective with AIA MSI
- on: in-kernel APLIC and in-kernel IMSIC
- off: user-space APLIC and user-space IMSIC
- split: user-space APLIC and in-kernel IMSIC
- Accel prop "kernel-irqchip", effective with in-kernel IMSIC
- emul: use MRIF as in-kernel IMSIC
- hw: use hardware guest IMSIC file as in-kernel IMSIC
- auto: use the hardware guest IMSICs whenever available otherwise
fallback to MRIF
Yong-Xuan Wang (8):
target/riscv/kvm: rewrite get/set for KVM_REG_RISCV_CSR
target/riscv/kvm: add KVM_REG_RISCV_CSR_AIA
target/riscv/kvm: add KVM_REG_RISCV_CSR_SMSTATEEN
target/riscv: add helper to get CSR name
target/riscv/kvm: rewrite kvm_riscv_handle_csr
target/riscv/kvm: add CSR_SIREG and CSR_STOPEI emulation
target/riscv/kvm: rename riscv-aia to riscv-imsic
docs: update the description about RISC-V AIA
docs/specs/riscv-aia.rst | 24 +++-
docs/system/riscv/virt.rst | 10 +-
target/riscv/cpu.h | 8 +-
target/riscv/csr.c | 30 ++--
target/riscv/kvm/kvm-cpu.c | 287 +++++++++++++++++++++++++++++--------
5 files changed, 266 insertions(+), 93 deletions(-)
--
2.17.1
next reply other threads:[~2025-02-17 8:18 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-17 8:17 Yong-Xuan Wang [this message]
2025-02-17 8:17 ` [PATCH 1/8] target/riscv/kvm: rewrite get/set for KVM_REG_RISCV_CSR Yong-Xuan Wang
2025-02-17 8:17 ` [PATCH 2/8] target/riscv/kvm: add KVM_REG_RISCV_CSR_AIA Yong-Xuan Wang
2025-02-17 8:17 ` [PATCH 3/8] target/riscv/kvm: add KVM_REG_RISCV_CSR_SMSTATEEN Yong-Xuan Wang
2025-02-17 8:17 ` [PATCH 4/8] target/riscv: add helper to get CSR name Yong-Xuan Wang
2025-02-17 14:01 ` Andrew Jones
2025-02-24 7:56 ` Yong-Xuan Wang
2025-02-17 8:17 ` [PATCH 5/8] target/riscv/kvm: rewrite kvm_riscv_handle_csr Yong-Xuan Wang
2025-02-17 8:17 ` [PATCH 6/8] target/riscv/kvm: add CSR_SIREG and CSR_STOPEI emulation Yong-Xuan Wang
2025-02-17 8:17 ` [PATCH 7/8] target/riscv/kvm: rename riscv-aia to riscv-imsic Yong-Xuan Wang
2025-02-17 14:07 ` Andrew Jones
2025-02-19 11:26 ` Yong-Xuan Wang
2025-02-17 8:17 ` [PATCH 8/8] docs: update the description about RISC-V AIA Yong-Xuan Wang
2025-02-18 15:53 ` [PATCH 0/8] riscv: AIA: kernel-irqchip=off support Kashyap Chamarthy
2025-02-24 7:17 ` Yong-Xuan Wang
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