From: Yong-Xuan Wang <yongxuan.wang@sifive.com>
To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: greentime.hu@sifive.com, vincent.chen@sifive.com,
frank.chang@sifive.com, jim.shu@sifive.com,
Yong-Xuan Wang <yongxuan.wang@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Weiwei Li <liwei1518@gmail.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Subject: [PATCH 4/4] hw/intc/aplic: refine kvm_msicfgaddr
Date: Mon, 17 Feb 2025 16:19:26 +0800 [thread overview]
Message-ID: <20250217081927.10613-5-yongxuan.wang@sifive.com> (raw)
In-Reply-To: <20250217081927.10613-1-yongxuan.wang@sifive.com>
Let kvm_msicfgaddr use the same format with mmsicfgaddr and smsicfgaddr.
Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
---
hw/intc/riscv_aplic.c | 24 +++++++++++++-----------
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
index e5714267c096..5964cde7e09e 100644
--- a/hw/intc/riscv_aplic.c
+++ b/hw/intc/riscv_aplic.c
@@ -181,8 +181,10 @@ void riscv_aplic_set_kvm_msicfgaddr(RISCVAPLICState *aplic, hwaddr addr)
{
#ifdef CONFIG_KVM
if (riscv_use_emulated_aplic(aplic->msimode)) {
+ addr >>= APLIC_xMSICFGADDR_PPN_SHIFT;
aplic->kvm_msicfgaddr = extract64(addr, 0, 32);
- aplic->kvm_msicfgaddrH = extract64(addr, 32, 32);
+ aplic->kvm_msicfgaddrH = extract64(addr, 32, 32) &
+ APLIC_xMSICFGADDRH_VALID_MASK;
}
#endif
}
@@ -403,12 +405,17 @@ static void riscv_aplic_msi_send(RISCVAPLICState *aplic,
}
}
- if (aplic->mmode) {
- msicfgaddr = aplic_m->mmsicfgaddr;
- msicfgaddrH = aplic_m->mmsicfgaddrH;
+ if (aplic->kvm_splitmode) {
+ msicfgaddr = aplic->kvm_msicfgaddr;
+ msicfgaddrH = ((uint64_t)aplic->kvm_msicfgaddrH << 32);
} else {
- msicfgaddr = aplic_m->smsicfgaddr;
- msicfgaddrH = aplic_m->smsicfgaddrH;
+ if (aplic->mmode) {
+ msicfgaddr = aplic_m->mmsicfgaddr;
+ msicfgaddrH = aplic_m->mmsicfgaddrH;
+ } else {
+ msicfgaddr = aplic_m->smsicfgaddr;
+ msicfgaddrH = aplic_m->smsicfgaddrH;
+ }
}
lhxs = (msicfgaddrH >> APLIC_xMSICFGADDRH_LHXS_SHIFT) &
@@ -431,11 +438,6 @@ static void riscv_aplic_msi_send(RISCVAPLICState *aplic,
addr |= (uint64_t)(guest_idx & APLIC_xMSICFGADDR_PPN_HART(lhxs));
addr <<= APLIC_xMSICFGADDR_PPN_SHIFT;
- if (aplic->kvm_splitmode) {
- addr |= aplic->kvm_msicfgaddr;
- addr |= ((uint64_t)aplic->kvm_msicfgaddrH << 32);
- }
-
address_space_stl_le(&address_space_memory, addr,
eiid, MEMTXATTRS_UNSPECIFIED, &result);
if (result != MEMTX_OK) {
--
2.17.1
prev parent reply other threads:[~2025-02-17 8:21 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-17 8:19 [PATCH 0/4] riscv: AIA: refinement for KVM acceleration Yong-Xuan Wang
2025-02-17 8:19 ` [PATCH 1/4] hw/riscv/virt: KVM AIA refinement Yong-Xuan Wang
2025-02-17 19:24 ` Daniel Henrique Barboza
2025-02-19 11:25 ` Yong-Xuan Wang
2025-02-17 8:19 ` [PATCH 2/4] hw/intc/imsic: refine the IMSIC realize Yong-Xuan Wang
2025-02-17 8:19 ` [PATCH 3/4] hw/intc/aplic: refine the APLIC realize Yong-Xuan Wang
2025-02-17 8:19 ` Yong-Xuan Wang [this message]
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